A CMOS 4-channel MIMO baseband receiver with 65dB harmonic rejection over 48MHz and 50dB spatial signal separation over 3MHz at 1.3mW

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A CMOS integrated 4-channel capacitive harmonic rejection baseband receiver and 4x4 MIMO analog core spatial filter demonstrate >65dB harmonic folding rejection over 48MHz, and >48.5dB signal separation across 3MHz baseband. The 65nm CMOS IC occupies 3.27mm(2) active area and consumes 0.67mW - 1.28mW.
Publisher
IEEE
Issue Date
2015-06
Language
English
Citation

29th Annual Symposium on VLSI Circuits, VLSI Circuits 2015, pp.C304 - C305

DOI
10.1109/vlsic.2015.7231300
URI
http://hdl.handle.net/10203/280346
Appears in Collection
BiS-Conference Papers(학술회의논문)
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