Browse "EE-Journal Papers(저널논문)" by Author Woo, R
Showing results 1 to 6 of 6
| A 120-mW, 3-D rendering engine with 6-Mb embedded DRAM and 3.2-GB/s runtime reconfigurable bus for PDA chip Woo, R; Yoon, CW; Kook, J; Lee, SJ; Yoo, Hoi-Jun, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.37, no.10, pp.1352 - 1355, 2002-10 |
| A 155-mW 50-mvertices/s graphics processor with fixed-point programmable vertex shader for mobile applications Sohn, JH; Woo, JH; Lee, MW; Kim, HJ; Woo, R; Yoo, Hoi-Jun, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.41, pp.1081 - 1091, 2006-05 |
| A 210-mW graphics LSI implementing full 3-D pipeline with 264 Mtexels/s texturing for mobile multimedia applications Woo, R; Choi, S; Sohn, JH; Song, SJ; Yoo, Hoi-Jun, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.39, pp.358 - 367, 2004-02 |
| A reconfigurable multilevel parallel texture cache memory with 75-GB/s parallel cache replacement bandwidth Park, SJ; Kim, JS; Woo, R; Lee, SJ; Lee, KM; Yang, TH; Jung, JY; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.37, no.5, pp.612 - 623, 2002-05 |
| An 80/20-MHz 160-mW multimedia processor integrated with embedded DRAM, MPEG-4 accelerator, and 3-D rendering engine for mobile applications Yoon, CW; Woo, R; Kook, J; Lee, SJ; Lee, K; Yoo, Hoi-Jun, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.36, no.11, pp.1758 - 1767, 2001-11 |
| Low-power 3D graphics processors for mobile terminals Sohn, JH; Park, YH; Yoon, CW; Woo, R; Park, SJ; Yoo, Hoi-Jun, IEEE COMMUNICATIONS MAGAZINE, v.43, pp.90 - 99, 2005-12 |
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