Browse "EE-Journal Papers(저널논문)" by Author Seomun, Jun
Showing results 1 to 5 of 5
| Design and Optimization of Power-Gated Circuits With Autonomous Data Retention Seomun, Jun; Shin, Young-Soo, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.19, no.2, pp.227 - 236, 2011-02 |
| Maximizing Frequency and Yield of Power-Constrained Designs Using Programmable Power-Gating Kim, Nam-Sung; Sinkar, Abhishek; Seomun, Jun; Shin, Young-Soo, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.20, no.10, pp.1885 - 1890, 2012-10 |
| Power Gating: Circuits, Design Methodologies, and Best Practice for Standard-Cell VLSI Designs Shin, Young-Soo; Seomun, Jun; Choi, Kyu-Myung; Sakurai, Takayasu, ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, v.15, no.4, 2010-09 |
| Skewed Flip-Flop and Mixed-V-t Gates for Minimizing Leakage in Sequential Circuits Seomun, Jun; Kim, Jae-Hyun; Shin, Young-Soo, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.27, pp.1956 - 1968, 2008-11 |
| Synthesis of Active-Mode Power-Gating Circuits Seomun, Jun; Shin, In-Sup; Shin, Young-Soo, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.31, no.3, pp.391 - 403, 2012-03 |
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