Showing results 1 to 10 of 10
A Vertically Integrated Junctionless Nanowire Transistor Lee, Byung-Hyun; Hur, Jae; Kang, Min-Ho; Bang, Tewook; Ahn, Dae-Chul; Lee, Dongil; Kim, Kwang-Hee; et al, NANO LETTERS, v.16, no.3, pp.1840 - 1847, 2016-03 |
Comprehensive Analysis of Gate-Induced Drain Leakage in Vertically Stacked Nanowire FETs: Inversion-Mode Versus Junctionless Mode Hur, Jae; Lee, Byung-Hyun; Kang, Min-Ho; Ahn, Dae-Chul; Bang, Tewook; Jeon, Seung-Bae; Choi, Yang-Kyu, IEEE ELECTRON DEVICE LETTERS, v.37, no.5, pp.541 - 544, 2016-05 |
Electro-Thermal Erasing at 10(4)-Fold Faster Speeds in Charge-Trap Flash Memory Kim, Myung-Su; Ahn, Dae-Chul; Park, Jun-Young; Seo, Myungsoo; Kim, Seong-Yeon; Kim, Wu-Kang; Yun, Dae-Hwan; et al, IEEE ELECTRON DEVICE LETTERS, v.40, no.2, pp.196 - 199, 2019-02 |
Impact of crystalline damage on a vertically integrated junctionless nanowire transistor Ahn, Dae-Chul; Lee, Byung-Hyun; Kang, Min-Ho; Hur, Jae; Bang, Tewook; Choi, Yang-Kyu, APPLIED PHYSICS LETTERS, v.109, no.18, 2016-10 |
Improved Technique for Extraction of Effective Mobility by Considering Gate Bias-Dependent Inversion Charges in a Floating-Body Si/SiGe pMOSFET Bae, Hagyoul; Bang, Tewook; Kim, Choong-Ki; Hur, Jae; Kim, Seyeob; Jeon, Chang-Hoon; Park, Jun-Young; et al, JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, v.17, no.5, pp.3247 - 3250, 2017-05 |
Low-Frequency Noise Characteristics in SONOS Flash Memory With Vertically Stacked Nanowire FETs Bang, Te-Wook; Lee, Byung-Hyun; Kim, Choong-Ki; Ahn, Dae-Chul; Jeon, Seung-Bae; Kang, Min-Ho; Oh, Jae-Sub; et al, IEEE ELECTRON DEVICE LETTERS, v.38, no.1, pp.40 - 43, 2017-01 |
Three-Dimensional Fin-Structured Semiconducting Carbon Nanotube Network Transistor Lee, Dong-Il; Lee, Byung-Hyun; Yoon, Jinsu; Ahn, Dae-Chul; Park, Jun-Young; Hur, Jae; Kim, Myung-Su; et al, ACS NANO, v.10, no.12, pp.10894 - 10900, 2016-12 |
Ultra-Fast Erase Method of SONOS Flash Memory by Instantaneous Thermal Excitation Ahn, Dae-Chul; Seol, Myeong-Lok; Hur, Jae; Moon, Dong-Il; Lee, Byung-Hyun; Han, Jin-Woo; Park, Jun-Young; et al, IEEE ELECTRON DEVICE LETTERS, v.37, no.2, pp.190 - 192, 2016-02 |
Vertically Integrated Nanowire-Based Unified Memory Lee, Byung-Hyun; Ahn, Dae-Chul; Kang, Min-Ho; Jeon, Seung-Bae; Choi, Yang-Kyu, NANO LETTERS, v.16, no.9, pp.5909 - 5916, 2016-09 |
Vertically Integrated Nanowire-Based Zero-Capacitor Dynamic Random Access Memory![]() Lee, Byung-Hyun; Kang, Min-Ho; Ahn, Dae-Chul; Choi, Yang-Kyu, ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY, v.6, no.1, pp.Q1 - Q5, 2017 |
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