Browse "EE-Journal Papers(저널논문)" by Author Kyung, Chong-Min
Showing results 89 to 127 of 127
| Offset Aperture : A Passive Single-Lens Camera for Depth Sensing Khan, Muhammad Umar Karim; Khan, Asim; Lim, Jinyeon; Hamidov, Said; Choi, Won-Seok; Yun, Woojin; Lee, Yeongmin; et al, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, v.29, no.5, pp.1380 - 1393, 2019-05 |
| OPTIMAL ENCODING OF MICROCOMMANDS IN MICROPROGRAMMED PROCESSORS Park, In-Cheol; HONG, SK; Kyung, Chong-Min, ELECTRONICS LETTERS, v.26, no.6, pp.393 - 395, 1990-03 |
| Path-based branch prediction using signature analysis Lee, S; Park, In-Cheol; Kyung, Chong-Min, MICROPROCESSORS AND MICROSYSTEMS, v.23, no.8-9, pp.527 - 536, 1999-12 |
| Path-classified trace cache for improving hit ratio in wide-issue processors Yang, JH; Park, In-Cheol; Kyung, Chong-Min, IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, v.E82D, no.10, pp.1338 - 1343, 1999-10 |
| PATH-SENSITIZED COVERING GRAPH METHOD FOR TECHNOLOGY MAPPING OF COMPLEX GATES JEONG, JC; Kyung, Chong-Min, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.74, no.10, pp.3057 - 3064, 1991-10 |
| Performance-driven event-based synchronization for multi-FPGA simulation accelerator with event time-multiplexing bus Kwon, YS; Kyung, Chong-Min, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.24, pp.1444 - 1456, 2005-09 |
| PIPELINE ANALOG-TO-DIGITAL CONVERSION WITH CHARGE-COUPLED DEVICES. Kyung, Chong-Min; Kim, Choong Ki, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.SC-15, no.2, pp.255 - 257, 1980-04 |
| Power Minimization for Dual- and Triple-Supply Digital Circuits via Integer Linear Programming Kyung, Chong-Min; Ahn, Ki-Yong, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E92A, pp.2318 - 2325, 2009-09 |
Practical Inter-Floor Noise Sensing System with Localization and Classification Son, Junho; Kyung, Chong-Min; Cho, Hyuntae, SENSORS, v.19, no.17, 2019-09 |
| PrePack: Predictive packetizing scheme for reducing channel traffic in transaction-level hardware/software co-emulation Lee, Jae-Gon; Kyung, Chong-Min, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.25, no.10, pp.1935 - 1949, 2006-10 |
| Program Phase-Aware Dynamic Voltage Scaling Under Variable Computational Workload and Memory Stall Environment Kim, Jungsoo; Yoo, Sungjoo; Kyung, Chong-Min, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.30, no.1, pp.110 - 123, 2011-01 |
| PYSHA: a shadow-testing acceleration scheme for ray tracing Choi, H.K.; Kyung, Chong-Min, COMPUTER-AIDED DESIGN, v.24, no.2, pp.93 - 104, 1992-02 |
| Radix-4 multiplier with regular layout structure Park, B; Shin, M; Park, In-Cheol; Kyung, Chong-Min, ELECTRONICS LETTERS, v.34, no.15, pp.1446 - 1447, 1998-07 |
| Rejecting Motion Outliers for Efficient Crowd Anomaly Detection Khan, Muhammad Umar Karim; Park, Hyun-Sang; Kyung, Chong-Min, IEEE TRANSACTIONS ON INFORMATION FORENSICS AND SECURITY, v.14, no.2, pp.541 - 556, 2019-02 |
| Resource-Efficient and High-Throughput VLSI Design of Global Optical Flow Method for Mobile Systems Jang, Sung-Joon; Kyung, Chong-Min, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.28, no.7, pp.1717 - 1725, 2020-07 |
| ROM and recursion free high accuracy approximation of base-2 logarithm using MacLaurin series Khan, Asim; Kareem, P.; Kyung, Chong-Min, ELECTRONICS LETTERS, v.54, no.10, pp.622 - 623, 2018-05 |
| Runtime Power Management of 3-D Multi-Core Architectures Under Peak Power and Temperature Constraints Kang, Kyungsu; Kim, Jungsoo; Yoo, Sungjoo; Kyung, Chong-Min, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.30, no.6, pp.905 - 918, 2011-06 |
| Runtime Thermal Management for 3-D Chip-Multiprocessors With Hybrid SRAM/MRAM L2 Cache Lee, Seung Han; Kang, Kyungsu; Kyung, Chong-Min, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.23, no.3, pp.520 - 533, 2015-03 |
| SAPICE: A design tool of CMOS operational amplifiers Yu, SD; Kyung, Chong-Min, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E80A, no.9, pp.1667 - 1675, 1997-09 |
| Scheduling driven circuit partitioning algorithm for multiple FPGAs using time-multiplexed, off-chip, multi-casting interconnection architecture Kwon, YS; Kyung, Chong-Min, MICROPROCESSORS AND MICROSYSTEMS, v.28, pp.341 - 350, 2004-08 |
| Selective Search Area Reuse Algorithm for Low External Memory Access Motion Estimation Shim, Heejun; Kyung, Chong-Min, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, v.19, pp.1044 - 1050, 2009-07 |
| SEWD: A cache architecture to speed up the misaligned instruction prefetch Yim, JS; Park, In-Cheol; Kyung, Chong-Min, IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, v.E80D, no.7, pp.742 - 745, 1997-07 |
| Spread omega network for high speed packet switching Lee, HC; Kyung, Chong-Min, IEICE TRANSACTIONS ON COMMUNICATIONS, v.E80B, no.1, pp.192 - 195, 1997-01 |
| STATE ASSIGNMENT IN FINITE-STATE MACHINES FOR MINIMAL SWITCHING POWER-CONSUMPTION HONG, SK; Park, In-Cheol; Hwang, Seung-Ho; Kyung, Chong-Min, ELECTRONICS LETTERS, v.30, no.8, pp.627 - 629, 1994-04 |
| Suppressing Rolling-Shutter Distortion of CMOS Image Sensors by Motion Vector Detection Chun, Jung-Bum; Jung, Hunjoon; Kyung, Chong-Min, IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, v.54, pp.1479 - 1487, 2008-11 |
| Symbolic reachability analysis for multiple-clock system design Yi, JH; Kyung, Chong-Min, JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, v.14, pp.533 - 551, 2005-06 |
| Synthesis of application specific instructions for embedded DSP software Choi, H; Kim, JS; Yoon, CW; Park, In-Cheol; Hwang, SH; Kyung, Chong-Min, IEEE TRANSACTIONS ON COMPUTERS, v.48, no.6, pp.603 - 614, 1999-06 |
| Synthesis of application-specific coprocessor for core-based ASIC design Lee, DH; Park, In-Cheol; Kyung, Chong-Min, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E84A, no.2, pp.604 - 613, 2001-02 |
| TEMPERATURE PROFILE OF A SILICON-ON-INSULATOR MULTILAYER STRUCTURE IN SILICON RECRYSTALLIZATION WITH INCOHERENT-LIGHT SOURCE Kyung, Chong-Min, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.31, no.12, pp.1845 - 1851, 1984-12 |
| Temperature-Aware Integrated DVFS and Power Gating for Executing Tasks With Runtime Distribution Kang, Kyungsu; Kim, Jungsoo; Yoo, Sungjoo; Kyung, Chong-Min, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.29, pp.1381 - 1394, 2010-09 |
| Three-stage clos-network switch architecture with buffered center stage for multi-class traffic Kang, MK; Kyung, Chong-Min, JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, v.15, pp.263 - 276, 2006-04 |
| Three-STEP HEURISTIC ALGORITHM FOR OPTIMAL PLA COLUMN FOLDING YANG, YY; Kyung, Chong-Min, ELECTRONICS LETTERS, v.24, no.17, pp.1088 - 1090, 1988-08 |
| Three-STEP PIN ASSIGNMENT ALGORITHM FOR BUILDING BLOCK LAYOUT CHOI, SG; Kyung, Chong-Min, ELECTRONICS LETTERS, v.28, no.20, pp.1882 - 1884, 1992-09 |
| Topology Synthesis for Low Power Cascaded Crossbar Switches Jang, Yongho; Kim, Jungsoo; Kyung, Chong-Min, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.29, pp.2041 - 2045, 2010-12 |
| TPartition: Testbench partitioning for hardware-accelerated functional verification Kim, YI; Kyung, Chong-Min, IEEE DESIGN TEST OF COMPUTERS, v.21, no.6, pp.484 - 493, 2004 |
| Two COMPLEMENTARY APPROACHES FOR MICROCODE BIT OPTIMIZATION Park, In-Cheol; ONG, SK; Kyung, Chong-Min, IEEE TRANSACTIONS ON COMPUTERS, v.43, no.2, pp.234 - 239, 1994-02 |
| TWO-DIMENSIONAL IMPURITY PROFILING NEAR THE MASK EDGE USING ANODISATION. Kyung, Chong-Min, ELECTRONICS LETTERS, v.21, no.14, pp.587 - 588, 1985-07 |
| Unsupervised deep learning for depth estimation with offset pixels Imran, Saad; Bin Mukarram, Sikander; Khan, Muhammad Umar Karim; Kyung, Chong-Min, OPTICS EXPRESS, v.28, no.6, pp.8619 - 8639, 2020-03 |
| Verification of Logic Gate Interconnection J.C.Jung; Kyung, Chong-Min, 전기학회논문지, v.24, no.2, pp.338 - 346, 1987-03 |
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