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Results 11-20 of 28 (Search time: 0.005 seconds).
| NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
|---|---|
| Deep Reinforcement Learning Framework for Optimal Decoupling Capacitor Placement on General PDN with an Arbitrary Probing Port Kim, Haeyeon; Kim, Joungho; Park, Hyunwook; Choi, Seonguk; Park, Joonsang; Kim, SeongGuk, 30th IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2021, IEEE, 2021-10-17 | |
| Signal Integrity Analysis of High Speed Channel considering Thermal Distribution Son, Keeyoung; Kim, Joungho; Kim, SeongGuk; Lho, Daehwan; Kim, Keunwoo; Park, Hyunwook; Park, Gap Yeol, 30th IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2021, IEEE, 2021-10-17 | |
| A New Design Method of GDDR6 WCLK Using Reinforcement Learning for over 20Gbps Park, Hyunwook; Kim, Joungho; Cho, Kyungjun; Sim, BooGyo; Kim, Subin; Jeong, Seung Taek, DesignCon 2021, IEEE, 2021-08-16 | |
| Modeling and Analysis of System-Level Power Supply Noise Induced Jitter (PSIJ) for 4 Gbps High Bandwidth Memory (HBM) I/O Interface Shin, TaeIn; Kim, Joungho; Park, Hyunwook; Kim, Keunwoo; Kim, SeongGuk; Son, Keeyoung; Park, Gap Yeol; Park, Joonsang; Choi, Seonguk, IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2021, IEEE, 2021-12-13 | |
| Signal Integrity Design and Analysis of a HDMI 2.1 Connector for Improved Electrical Characteristics Park, Hyunwook; Kim, Joungho; Park, Joonsang; Park, Gap Yeol; Lho, Daehwan; Sim, BooGyo; Kang, Hyungmin; Shin, TaeIn; Kim, SeongGuk; Choi, Seonguk, IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2021, IEEE, 2021-12-13 | |
| Signal Integrity Design and Analysis of a Spiral Through-Silicon Via (TSV) Array Channel for High Bandwidth Memory (HBM) Kim, SeongGuk; Kim, Joungho; Shin, TaeIn; Park, Hyunwook; Lho, Daehwan; Son, Keeyoung; Kim, Keunwoo; Park, Joonsang; Choi, Seonguk; Kim, Haeyeon, IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2021, IEEE, 2021-12-13 | |
| Wireless Memory Test: A Breakthrough Solution for Highly Reliable HBM Park, Hyunwook; Kim, Joungho; Kim, Subin; Kim, SeongGuk; Jeong, Seung Taek; Park, Gap Yeol, Designcon 2021, IEEE, 2021-08-17 | |
| Neural Language Model Enables Extremely Fast and Robust Routing on Interposer Kim, Minsu; Kim, Joungho; Park, Hyunwook; Choi, Seonguk; Kim, Haeyeon; Kim, SeongGuk; Son, Keeyoung; Kim, Keunwoo; Lho, Daehwan, Designcon 2021, IEEE, 2021-08-17 | |
| Deep Reinforcement Learning-based Interconnection Design for 3D X-Point Array Structure Considering Signal Integrity Son, Kyungjune; Kim, Minsu; Park, Hyunwook; Park, Shinyoung; Park, Gap Yeol; Lho, Daewhan; Kim, Seoungguk; Shin, Taein; Son, Keeyoung; Kim, Keunwoo; Kim, Joungho, 2020 IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2020, Institute of Electrical and Electronics Engineers Inc., 2020-12 | |
| Deep Neural Network-based Lumped Circuit Modeling using Impedance Curve Lho, Daehwan; Park, Hyunwook; Kim, Seongguk; Shin, Taein; Kim, Keunwoo; Son, Kyungjune; Kang, Hyungmin; Sim, Boogyo; Son, Keeyoung; Kim, Minsu; Kim, Joungho, 2020 IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2020, Institute of Electrical and Electronics Engineers Inc., 2020-12 |
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