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NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
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Sequential Policy Network-based Optimal Passive Equalizer Design for an Arbitrary Channel of High Bandwidth Memory using Advantage Actor Critic Choi, Seonguk; Kim, Joungho; Park, Hyunwook; Son, Keeyoung; Kim, SeongGuk; Park, Joonsang; Kim, Haeyeon; Shin, TaeIn; Kim, Keunwoo, 30th IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2021, IEEE, 2021-10-17 | |
Design and Analysis of HDMI 2.1 Connector for Crosstalk Reduction using Tabs and Inverse Tabs Lho, Daehwan; Kim, Joungho; Park, Hyunwook; Park, Gap Yeol; Park, Joonsang; Son, Kyungjune; Sim, BooGyo; Kang, Hyungmin; Kim, SeongGuk; Shin, TaeIn; Kim, Keunwoo; Son, Keeyoung, 30th IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2021, IEEE, 2021-10-17 | |
Deep Reinforcement Learning-based Pin Assignment Optimization of BGA Packages considering Signal Integrity with Graph Representation Park, Joonsang; Kim, Joungho; Kim, SeongGuk; Son, Keeyoung; Shin, TaeIn; Park, Hyunwook; Choi, Seonguk; Kim, Haeyeon; Kim, Keunwoo, 30th IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2021, IEEE, 2021-10-17 | |
Modeling and Analysis of System-Level Power Supply Noise Induced Jitter (PSIJ) for 4 Gbps High Bandwidth Memory (HBM) I/O Interface Shin, TaeIn; Kim, Joungho; Park, Hyunwook; Kim, Keunwoo; Kim, SeongGuk; Son, Keeyoung; Park, Gap Yeol; Park, Joonsang; Choi, Seonguk, IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2021, IEEE, 2021-12-13 | |
Signal Integrity Design and Analysis of a Spiral Through-Silicon Via (TSV) Array Channel for High Bandwidth Memory (HBM) Kim, SeongGuk; Kim, Joungho; Shin, TaeIn; Park, Hyunwook; Lho, Daehwan; Son, Keeyoung; Kim, Keunwoo; Park, Joonsang; Choi, Seonguk; Kim, Haeyeon, IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2021, IEEE, 2021-12-13 |
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