DSpace at KOASAS
Browsing DSpace

Browse "EE-Conference Papers(학술회의논문)" by Author Park, Hangi

A to Z

All 0-9

A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

or enter first few letters:

Showing results 1 to 6 of 6

1
32.1 A 365fsrms-Jitter and -63dBc-Fractional Spur 5.3GHz-Ring-DCO-Based Fractional-N DPLL Using a DTC Second/Third- Order Nonlinearity Cancelation and a Probability-Density-Shaping ΔΣM

Park, Hangi; Hwang, Chanwoong; Seong, Taeho; Lee, Yongsun; Choi, Jaehyouk, 2021 IEEE International Solid- State Circuits Conference (ISSCC), pp.442 - 444, IEEE, 2021-02-13

2
32.4 A 104fsrms-Jitter and -61dBc-Fractional Spur 15GHz Fractional-N Subsampling PLL Using a Voltage-Domain Quantization-Error Cancelation Technique

Kim, Juyeop; Jo, Yongwoo; Lim, Younghyun; Seong, Taeho; Park, Hangi; Yoo, Seyeon; Lee, Yongsun; et al, 2021 IEEE International Solid- State Circuits Conference (ISSCC), pp.448 - 450, IEEE, 2021-02-13

3
A -240dB-FoMjitter and -115dBc/Hz PN @ 100kHz, 7.7GHz Ring-DCO-Based Digital PLL Using P/I-Gain Co-Optimization and Sequence-Rearranged Optimally Spaced TDC for Flicker-Noise Reduction

Lee, Yongsun; Seong, Taeho; Lee, Jeonghyun; Hwanq, Chanwoong; Park, Hangi; Choi, Jaehyouk, 2020 IEEE International Solid-State Circuits Conference, ISSCC 2020, pp.266 - 268, Institute of Electrical and Electronics Engineers Inc., 2020-02-19

4
A 170MHz-Lock-In-Range and-253dB-FoM(jitter), 12-to-14.5GHz Subsampling PLL with a 150 mu W Frequency-Disturbance-Correcting Loop Using a Low-Power Unevenly Spaced Edge Generator

Lim, Younghyun; Kim, Juyeop; Jo, Yongwoo; Bang, Jooeun; Yoo, Seyeon; Park, Hangi; Yoon, Heein; et al, IEEE International Solid-State Circuits Conference (ISSCC), pp.280 - 282, IEEE, 2020-02-19

5
A 188fsrms-Jitter and -243d8-FoMjitter5.2GHz-Ring-DCO-Based Fractional-N Digital PLL with a 1/8 DTC-Range-Reduction Technique Using a Quadruple-Timing-Margin Phase Selector

Hwang, Chanwoong; Park, Hangi; Seong, Taeho; Choi, Jaehyouk, 2022 IEEE International Solid-State Circuits Conference, ISSCC 2022, pp.378 - 380, Institute of Electrical and Electronics Engineers Inc., 2022-02

6
A-58dBc-Worst-Fractional-Spur and-234dB-FoM(jitter), 5.5GHz Ring-DCO-Based Fractional-N DPLL Using a Time-Invariant-Probability Modulator, Generating a Nonlinearity-Robust DTC-Control Word

Seong, Taeho; Lee, Yongsun; Hwang, Chanwoong; Lee, Jeonghyun; Park, Hangi; Lee, Kyuho Jason; Choi, Jaehyouk, 2020 IEEE International Solid-State Circuits Conference, ISSCC 2020, pp.270 - 272, Institute of Electrical and Electronics Engineers Inc., 2020-02-19

Discover

rss_1.0 rss_2.0 atom_1.0