(A) lot-to-order assignment problem for multi-chip package assembly멀티 칩 패키지 조립을 위한 주문 별 로트 할당 문제

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We examine a lot-to-order assignment problem for multi-chip semiconductor packaging. Several different chips are assembled into a product. An order can be filled with multiple products that are physically identical but use different chips. We wish to find a method of assigning the chips in the stock to the orders for each day so that the required orders are fulfilled as much as possible and the number of residual chips is minimized. While the problem can be modeled as an integer programming model, due to the complexity, we propose four efficient heuristic procedures. Each procedure consists of three stages, selecting an order with some priority, selecting the product mix for the order, and assigning chips to each product. We present computational performance of the proposed heuristic procedures as compared with the existing heuristic rule.
Advisors
Lee, Tae-Eogresearcher이태억researcher
Description
한국과학기술원 : 산업공학과,
Publisher
한국과학기술원
Issue Date
2005
Identifier
243620/325007  / 020033436
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 산업공학과, 2005.2, [ iv, 54 p. ]

Keywords

assignment space effectotide; order; lot; bin covering; Multi-chip; Au nanoparticles; 할당 재고효과 탄소나노튜브 구조 ?입체선택적인 요오드고리화 반응에 관한 연구?발광 물질; 주문; 로트; 빈 커버링; 멀티칩; the flow analysis of 100W-stack; Carbon nanotubeis-Alkenesumina on

URI
http://hdl.handle.net/10203/40709
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=243620&flag=dissertation
Appears in Collection
IE-Theses_Master(석사논문)
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