(The) fabrication and characterization of PI-HFET (P-type insulated gate heterostructure FET)

Abstract

For VLSI application, DCFL is needed due to its low power consumption without decreasing the speed. DCFL requires high gate-to-channel barrier height. Existed GaAs MESFET or HFETs whose gate materials are metal or $n^+$-semiconductor have low barrier heights, 0.7-1.2[eV]. On the other hand $p^+$-type. GaAs gate offers a higher barrier height, -1.8 [eV] for channel electrons. But the barrier height for the holes in $p^+$ -type gate is -1.4 [eV]. The fabricated PI-HFETs show 1.2[V] cut-in voltage.