(A) low-power turbo decoder for W-CDMA

Abstract

Recently, turbo codes have been proposed for wireless communications, such as the universal mobile telecommunication system (UMTS), for the third generation of mobile communications. The design of low-cost and low-power turbo decoder is very important in wireless communication systems. In this thesis, supplementary stopping criteria and a log-MAP decoder with reduced memory accesses are proposed for solutions. Supplementary stopping criteria are attached to existing efficient stopping criteria for lower iteration number, improving BER performance and low complexity of implementation. Proposed log-MAP decoder uses reversed calculation of backward metrics instead of memory access using efficient approximation scheme. At practical SNR, around 90% memory accesses are replaced by computation. As a result, power bottleneck is in charge of logic circuits. Experimental results show proposed algorithm can reduce power of a log-MAP decoder by 28.9% with a slightly increased logic gates.