Now a day, 3D Computer Graphics has become a very important technique used in CAD tools, games, film making, virtual reality, etc. Although there are many techniques used in 3D Computer Graphics, texture mapping is one of the most successful and popular techniques in high-quality image synthesis. However, the greatest weakness of texture mapping is that it requires high memory bandwidth to fetch the enormous texture image data. Therefore, a cache memory is generally employed for reducing the required memory bandwidth and improving system processing speed. So far, there have been many researches about texture cache. In spite of many researches, texture memory bandwidth problem is still left as a critical issue because of increased texture usages and the introduction of more sophisticated filter methods, which need more texels(texture pixels) per pixel.
In this thesis, we propose a new cache-indexing method, A-index, to reduce memory bandwidth required for fetching texture image data. By using the A-index, which adaptively changes cache index bits of a texture cache considering data access characteristics, we can reduce cache misses. This is possible by the facts that texture data are 2D data and the access direction is a randomly directed line. Further, we present an effective direction decision method for determining the texel-access direction more precisely. To verify our ideas, we designed a texture mapping hardware including a two-level texture cache in Verilog-HDL.
Besides, a 3D object is composed of triangles, which are decomposed into pixel spans. A cache miss caused by contention between two texels in two different spans is an inter-span replacement. We analyzed the relationship between the numbers of inter-span replacements and cache misses. From the analysis, we show that the number of cache misses in a texture cache can be estimated by simply calculating the number of inter-span replacements.
From HDL simulations on various test scenes, we examined th...