Highly energy-efficient manifold microchannel for cooling electronics with a coefficient of performance over 100,000

Abstract

Thermal management has become a critical challenge, as the die-level heat flux of advanced electronics surpasses 1,000 W/cm2. Microfluidic cooling devices embedded in the semiconductor substrate offer a promising solution to address these high heat fluxes. However, conventional microfluidic cooling devices suffer from excessive pressure drop and nonuniform temperature distributions across the chip, which reduce cooling efficiency and device reliability. Here, a highly energy-efficient manifold microfluidic cooler is developed and experimentally demonstrated to dissipate die-level heat fluxes exceeding 2,000 W/cm2 while maintaining the junction temperature below 100 °C. This performance is achieved with a total pressure drop of 7.8 kPa under single-phase operation using room-temperature water as the coolant. For this, a multi-fidelity modeling and optimization framework is developed that strategically integrates a rapid, domain-surveying one-dimensional model with accurate three-dimensional numerical simulations. The design parameters are systematically optimized to maximize thermal-hydraulic performance and ensure a uniform chip temperature distribution. The optimized microfluidic cooler embedded within the silicon thermal test chip is fabricated using a low-temperature (<350 °C), CMOS-compatible process, with a total thickness of 880 μm. A record-high coefficient of performance (COP) of 106,000 is reported at a die-level heat flux of 1,180 W/cm2 under the constraint of a maximum temperature rise of 60 K. This corresponds to nearly a tenfold enhancement in energy efficiency over the previous state of the art and marks a significant advancement toward sustainable cooling for high-performance electronics.