FPGA-Accelerated Data Preprocessing for Personalized Recommendation Systems

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Deep neural network (DNN)-based recommendation systems (RecSys) are one of the most successfully deployed machine learning applications in commercial services for predicting ad click-through rates or rankings. While numerous prior work explored hardware and software solutions to reduce the training time of RecSys, its end-to-end training pipeline including the data preprocessing stage has received little attention. In this work, we provide a comprehensive analysis of RecSys data preprocessing, root-causing the feature generation and normalization steps to cause a major performance bottleneck. Based on our characterization, we explore the efficacy of an FPGA-accelerated RecSys preprocessing system that achieves a significant 3.4-12.1x end-to-end speedup compared to the baseline CPU-based RecSys preprocessing system.
Publisher
IEEE COMPUTER SOC
Issue Date
2024-01
Language
English
Article Type
Article
Citation

IEEE COMPUTER ARCHITECTURE LETTERS, v.23, no.1, pp.9 - 10

ISSN
1556-6056
DOI
10.1109/LCA.2023.3336841
URI
http://hdl.handle.net/10203/322585
Appears in Collection
EE-Journal Papers(저널논문)
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