TWO-TERMINAL BIRISTOR HAVING POLYSILICON EMITTER LAYER INSERTED THEREIN AND MANUFACTURING METHOD THEREFOR폴리 실리콘 이미터 층이 삽입된 2-단자 바이리스터 및 그 제조 방법

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Disclosed are a two-terminal biristor having a polysilicon emitter layer inserted therein and a manufacturing method therefor. The two-terminal biristor manufacturing method according to an embodimentof the present invention comprises the steps of: forming a first semiconductor layer of a first type on a substrate; forming a second semiconductor layer of a second type on the first semiconductor layer; forming a third semiconductor layer of the first type on the second semiconductor layer; and forming a polysilicon layer of the first type on the third semiconductor layer.
Assignee
KAIST
Country
CC (Cocos (Keeling) Islands)
Application Date
2019-08-20
Application Number
201980002014.8
Registration Date
2024-04-05
Registration Number
111083935
URI
http://hdl.handle.net/10203/319479
Appears in Collection
EE-Patent(특허)
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