DC Field | Value | Language |
---|---|---|
dc.contributor.author | Zhang, Shuye | ko |
dc.contributor.author | Duan, Ran | ko |
dc.contributor.author | Xu, Sunwu | ko |
dc.contributor.author | Xue, Panfei | ko |
dc.contributor.author | Wang, Chengqian | ko |
dc.contributor.author | Chen, Jieshi | ko |
dc.contributor.author | Paik, Kyung-Wook | ko |
dc.contributor.author | He, Peng | ko |
dc.date.accessioned | 2022-05-30T06:00:25Z | - |
dc.date.available | 2022-05-30T06:00:25Z | - |
dc.date.created | 2022-05-30 | - |
dc.date.created | 2022-05-30 | - |
dc.date.created | 2022-05-30 | - |
dc.date.issued | 2022-06 | - |
dc.identifier.citation | JOURNAL OF ADVANCED JOINING PROCESSES, v.5 | - |
dc.identifier.issn | 2666-3309 | - |
dc.identifier.uri | http://hdl.handle.net/10203/296704 | - |
dc.description.abstract | As the packaging density in wafer-level packaging increases, there is an increasing need for packaging processes for fan-out packaged devices; thus, the soldering reliability of board-level devices is particularly important. Fanout wafer-level packaging (FOWLP) is typically packaged using flip-chip methods on Cu electrodes and printed circuit board (PCB) substrates. Therefore, in this study, we designed new PCBs based on a 6 x 4 mm2 FOWLP test vehicle with an electroless nickel gold (ENIG) surface finish. After optimizing 21 bonding parameters (temperature, holding time, and shear strength), the ideal bonding parameter was achieved at 260 degrees C for 10 s. We also found that the ENIG pads were dissolved in solder joints at conditions above 270 degrees C for 10 s, causing the pads to break away from the PCB and the solder joint failure. As a result, the mechanical properties of the joints declined. Under long high-temperature durations, the molten Sn bypassed the Ni layer, flowed into the bottom of the pad, and reacted with Cu, causing volume shrinkage of the solder joints and the pads to break away from the PCB. | - |
dc.language | English | - |
dc.publisher | ELSEVIER | - |
dc.title | Shear performance and accelerated reliability of solder interconnects for fan-out wafer-level package | - |
dc.type | Article | - |
dc.identifier.scopusid | 2-s2.0-85120717471 | - |
dc.type.rims | ART | - |
dc.citation.volume | 5 | - |
dc.citation.publicationname | JOURNAL OF ADVANCED JOINING PROCESSES | - |
dc.identifier.doi | 10.1016/j.jajp.2021.100076 | - |
dc.contributor.localauthor | Paik, Kyung-Wook | - |
dc.contributor.nonIdAuthor | Zhang, Shuye | - |
dc.contributor.nonIdAuthor | Duan, Ran | - |
dc.contributor.nonIdAuthor | Xu, Sunwu | - |
dc.contributor.nonIdAuthor | Xue, Panfei | - |
dc.contributor.nonIdAuthor | Wang, Chengqian | - |
dc.contributor.nonIdAuthor | Chen, Jieshi | - |
dc.contributor.nonIdAuthor | He, Peng | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Fan-out wafer-level package | - |
dc.subject.keywordAuthor | Shear strength | - |
dc.subject.keywordAuthor | Soldering process | - |
dc.subject.keywordAuthor | Accelerated reliability | - |
dc.subject.keywordPlus | INTEGRATION | - |
dc.subject.keywordPlus | EVOLUTION | - |
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