An Energy-Efficient Voltage Step-up System for 3D NAND Flash using Charge-Compensating Regulator

Cited 0 time in webofscience Cited 0 time in scopus
  • Hit : 58
  • Download : 0
This paper presents an energy-efficient wordline driver for a triple level cell 3D NAND flash. Unlike conventional circuit that has a large charge pump and high-voltage regulators operating under the inefficient stepped-up voltage, the proposed circuit has a distributed charge pump (CP) that directly drive the wordlines, aided by a charge compensating regulator that operate under the nominal supply and produces a ripple free output. The proposed voltage driver for a 39 wordline layer is fabricated in 180nm UHV process and it consumes 99.8nJ from a 2.2V during 1 unit of program pulse and verify period, which is more than 2.1x improvement in energy efficiency compared to the conventional scheme.
Publisher
Institute of Electrical and Electronics Engineers Inc.
Issue Date
2021-06
Language
English
Citation

35th Symposium on VLSI Circuits, VLSI Circuits 2021

DOI
10.23919/VLSICircuits52068.2021.9492355
URI
http://hdl.handle.net/10203/288778
Appears in Collection
EE-Conference Papers(학술회의논문)
Files in This Item
There are no files associated with this item.

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0