DC Field | Value | Language |
---|---|---|
dc.contributor.author | Jeong, Hyunsik | ko |
dc.contributor.author | Cho, SeongHwan | ko |
dc.date.accessioned | 2021-11-04T06:43:33Z | - |
dc.date.available | 2021-11-04T06:43:33Z | - |
dc.date.created | 2021-10-26 | - |
dc.date.created | 2021-10-26 | - |
dc.date.issued | 2021-06 | - |
dc.identifier.citation | 35th Symposium on VLSI Circuits, VLSI Circuits 2021 | - |
dc.identifier.uri | http://hdl.handle.net/10203/288778 | - |
dc.description.abstract | This paper presents an energy-efficient wordline driver for a triple level cell 3D NAND flash. Unlike conventional circuit that has a large charge pump and high-voltage regulators operating under the inefficient stepped-up voltage, the proposed circuit has a distributed charge pump (CP) that directly drive the wordlines, aided by a charge compensating regulator that operate under the nominal supply and produces a ripple free output. The proposed voltage driver for a 39 wordline layer is fabricated in 180nm UHV process and it consumes 99.8nJ from a 2.2V during 1 unit of program pulse and verify period, which is more than 2.1x improvement in energy efficiency compared to the conventional scheme. | - |
dc.language | English | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.title | An Energy-Efficient Voltage Step-up System for 3D NAND Flash using Charge-Compensating Regulator | - |
dc.type | Conference | - |
dc.identifier.scopusid | 2-s2.0-85111841946 | - |
dc.type.rims | CONF | - |
dc.citation.publicationname | 35th Symposium on VLSI Circuits, VLSI Circuits 2021 | - |
dc.identifier.conferencecountry | JA | - |
dc.identifier.conferencelocation | Kyoto | - |
dc.identifier.doi | 10.23919/VLSICircuits52068.2021.9492355 | - |
dc.contributor.localauthor | Cho, SeongHwan | - |
dc.contributor.nonIdAuthor | Jeong, Hyunsik | - |
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