DC Field | Value | Language |
---|---|---|
dc.contributor.author | Na, Seonjin | ko |
dc.contributor.author | Lee, Sunho | ko |
dc.contributor.author | Kim, Yeonjae | ko |
dc.contributor.author | Park, Jongse | ko |
dc.contributor.author | Huh, Jaehyuk | ko |
dc.date.accessioned | 2021-06-10T07:30:28Z | - |
dc.date.available | 2021-06-10T07:30:28Z | - |
dc.date.created | 2021-06-09 | - |
dc.date.created | 2021-06-09 | - |
dc.date.created | 2021-06-09 | - |
dc.date.created | 2021-06-09 | - |
dc.date.issued | 2021-02-27 | - |
dc.identifier.citation | The 27th IEEE International Symposium on High-Performance Computer Architecture (HPCA-27), pp.1 - 13 | - |
dc.identifier.issn | 1530-0897 | - |
dc.identifier.uri | http://hdl.handle.net/10203/285738 | - |
dc.description.abstract | Hardware-based trusted execution has opened a promising new opportunity for enabling secure cloud computing. Nevertheless, the current trusted execution environments are limited to the traditional CPU-based computation, while more and more critical workloads such as machine learning require to use GPUs. For secure GPU computing, recent studies proposed to isolate critical GPU operations from the operating system by providing trusted execution environments for GPUs. However, a missing component in the prior GPU trusted execution studies is a hardware-based memory protection technique optimized for GPUs. Start-of-Art memory protection techniques for CPUs use counter-mode encryption, where per-block counters are used as timestamps for generating one-Time pads. The integrity of counters is protected by a counter tree. This study investigates the hardware memory encryption for GPUs and identifies counter cache misses as one of the key performance bottlenecks. To mitigate the overheads of counter cache misses, this paper proposes a novel technique, called common counters, for efficient counter-mode encryption and counter integrity protection. The proposed technique exploits unique characteristics of common GPU applications. In GPU applications, a large portion of application memory is written only once by the initial data transfer from the CPU memory, or the number of writes by the GPU applications to major data structures tends to be uniform. Exploiting the uniform write property, this study proposes to use a common counter representation to complement the existing per-block encryption counters. With the common counters, the proposed technique can almost eliminate the performance overheads caused by counter cache misses, reducing the degradation to 2.9%. | - |
dc.language | English | - |
dc.publisher | IEEE Computer Society | - |
dc.title | Common Counters: Compressed Encryption Counters for Secure GPU Memory | - |
dc.type | Conference | - |
dc.identifier.wosid | 000671076000001 | - |
dc.identifier.scopusid | 2-s2.0-85105014552 | - |
dc.type.rims | CONF | - |
dc.citation.beginningpage | 1 | - |
dc.citation.endingpage | 13 | - |
dc.citation.publicationname | The 27th IEEE International Symposium on High-Performance Computer Architecture (HPCA-27) | - |
dc.identifier.conferencecountry | KO | - |
dc.identifier.conferencelocation | Virtual | - |
dc.identifier.doi | 10.1109/HPCA51647.2021.00011 | - |
dc.contributor.localauthor | Park, Jongse | - |
dc.contributor.localauthor | Huh, Jaehyuk | - |
dc.contributor.nonIdAuthor | Na, Seonjin | - |
dc.contributor.nonIdAuthor | Lee, Sunho | - |
dc.contributor.nonIdAuthor | Kim, Yeonjae | - |
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