Patterning of vapor phase deposited polymer dielectric thin film for organic integrated circuits

Abstract

Organic electronics has been spotlighted for the next generation electronic devices due to the advantages in flexibility, lightweightness and various form-factors. Most research is focused on the improvement in performance of the ogranic semiconductor based devices due to its inferior mobility compared to the conventional silicon semiconductor. However, there are lack of research in the organic semiconductor based integrated circuits and related technology, because the organic materials have poor robustness in chemical and thermal stress. In this thesis, the polymer dielectric layers werer patterned while initiated chemical vapor deposition (iCVD) process, to fabricated organic integrated circuits and to suggest a novel interconnection and device scheme.