A Strategy for Optimizing Low Operating Voltage in a Silicon Biristor

Cited 0 time in webofscience Cited 0 time in scopus
  • Hit : 56
  • Download : 0
A pure silicon-based biristor with low latch-up voltage operation and wide latch window was studied using numerical simulations. Various parameters were optimized, including the doping concentrations of the emitter, base and collector as well as the geometric dimensions of the base length and base diameter. An optimization methodology that considers the physical influences of each parameter mentioned above can provide insightful guidance for actual device fabrication. A pure silicon biristor with both low operating voltage and a wide sensing window, without capacitor, gate and gate insulator, can be applied for post-DRAM technology.
Publisher
Institute of Electrical and Electronics Engineers
Issue Date
2020-01
Language
English
Citation

IEEE Transactions on Nanotechnology, v.19, pp.5 - 10

ISSN
1536-125X
DOI
10.1109/TNANO.2019.2956092
URI
http://hdl.handle.net/10203/272627
Appears in Collection
EE-Journal Papers(저널논문)
Files in This Item
There are no files associated with this item.

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0