A Low-Jitter Injection-Locked Multi-Frequency Generator Using Digitally Controlled Oscillators and Time-Interleaved Calibration

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dc.contributor.authorYoon, Heeinko
dc.contributor.authorPark, Suneuiko
dc.contributor.authorChoi, Jaehyoukko
dc.date.accessioned2019-12-17T08:20:12Z-
dc.date.available2019-12-17T08:20:12Z-
dc.date.created2019-12-13-
dc.date.created2019-12-13-
dc.date.created2019-12-13-
dc.date.issued2019-06-
dc.identifier.citationIEEE JOURNAL OF SOLID-STATE CIRCUITS, v.54, no.6, pp.1564 - 1574-
dc.identifier.issn0018-9200-
dc.identifier.urihttp://hdl.handle.net/10203/269798-
dc.description.abstractThis paper presents a low-jitter, injection-locked frequency generator that can provide multiple output frequencies concurrently. The injection-locked digitally controlled oscillators (DCOs) can be controlled separately so that their output frequencies can be changed independently between 0.9 and 1.2 GHz in 15-MHz steps. Due to the proposed time-interleaved frequency calibrator that operates continuously in the background, all injection-locked DCOs are ensured to maintain excellent jitter performance against process, voltage, and temperature (PVT) variations. As a prototype, the proposed injection-locked, multi-frequency generator (ILMFG) was designed to generate two independently controlled output signals, and it was fabricated in a 65-nm CMOS technology. The 1-MHz phase noise and the rms jitter integrated from 1 kHz to 40 MHz of the 960-MHz output signal were -133.5 dBc/Hz and 375 fs, respectively. The degradation of rms jitter was restricted to less than 10%. The silicon area was 0.05 mm(2), and the total power consumption was 7.7 mW when generating two different output frequencies.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleA Low-Jitter Injection-Locked Multi-Frequency Generator Using Digitally Controlled Oscillators and Time-Interleaved Calibration-
dc.typeArticle-
dc.identifier.wosid000469840600006-
dc.identifier.scopusid2-s2.0-85066444928-
dc.type.rimsART-
dc.citation.volume54-
dc.citation.issue6-
dc.citation.beginningpage1564-
dc.citation.endingpage1574-
dc.citation.publicationnameIEEE JOURNAL OF SOLID-STATE CIRCUITS-
dc.identifier.doi10.1109/JSSC.2019.2893513-
dc.contributor.localauthorChoi, Jaehyouk-
dc.contributor.nonIdAuthorYoon, Heein-
dc.contributor.nonIdAuthorPark, Suneui-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorClock multiplier-
dc.subject.keywordAuthordigitally controlled oscillator (DCO)-
dc.subject.keywordAuthorfractional resolution-
dc.subject.keywordAuthorfrequency synthesizer-
dc.subject.keywordAuthorinjection locking-
dc.subject.keywordAuthorjitter-
dc.subject.keywordAuthormulti-frequency generator-
dc.subject.keywordAuthorphase noise-
dc.subject.keywordAuthorreplica-
dc.subject.keywordAuthortime-interleaved-
dc.subject.keywordPlusPHASE-NOISE-
dc.subject.keywordPlusLOW-POWER-
dc.subject.keywordPlusFREQUENCY-MULTIPLIER-
dc.subject.keywordPlusLOOP-
dc.subject.keywordPlusPLL-
dc.subject.keywordPlusCOMPACT-
dc.subject.keywordPlusLOCKING-
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