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1
A novel mechanism for delay-insensitive data transfer based on current-mode multiple valued logic

Oh, MH; Har, DS, INTEGRATED CIRCUIT AND SYSTEM DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION Book Series: LECTURE NOTES IN COMPUTER SCIENCE, v.3254, pp.691 - 700, 2004

2
Low delay-power product current-mode multiple valued logic for delay-insensitive data transfer mechanism

Oh, MH; Har, Dongsoo, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E88A, pp.1379 - 1383, 2005-05

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