Fully subthreshold current-based characterization of interface traps and surface potential in III-V-on-insulator MOSFETs

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dc.contributor.authorKim, Seong Kwangko
dc.contributor.authorLee, Jungminko
dc.contributor.authorGeum, Dae-Myeongko
dc.contributor.authorPark, Min-Suko
dc.contributor.authorChoi, Won Junko
dc.contributor.authorChoi, Sung-Jinko
dc.contributor.authorKim, Dae Hwanko
dc.contributor.authorKim, Sanghyeonko
dc.contributor.authorKim, Dong Myongko
dc.date.accessioned2019-02-20T04:58:06Z-
dc.date.available2019-02-20T04:58:06Z-
dc.date.created2019-02-07-
dc.date.issued2016-08-
dc.identifier.citationSOLID-STATE ELECTRONICS, v.122, pp.8 - 12-
dc.identifier.issn0038-1101-
dc.identifier.urihttp://hdl.handle.net/10203/250273-
dc.description.abstractWe report characterization of the interface trap distribution (D-it(E)) over the bandgap in III-V metal-oxide- semiconductor field-effect transistors (MOSFETs) on insulator. Based only on the experimental subthreshold current data and differential coupling factor, we simultaneously obtained D-it(E) and a nonlinear mapping of the gate bias (V-GS) to the trap level (E-t) via the effective surface potential (psi(S),(eff)). The proposed technique allows direct extraction of the interface traps at the In0.53Ga0.47As-on insulator (-OI) MOSFETs only from the experimental subthreshold current data. Applying the technique to the In0.53Ga0.47As channel III-V-OI MOSFETs with the gate width/length W/L = 100/50, 100/25, and 100/10 mu m/mu m, we obtained D-it(E) congruent to 10(11)-10(12) eV(-1) cm(-2) over the bandgap without the dimension dependence. (C) 2016 Elsevier Ltd. All rights reserved.-
dc.languageEnglish-
dc.publisherPERGAMON-ELSEVIER SCIENCE LTD-
dc.titleFully subthreshold current-based characterization of interface traps and surface potential in III-V-on-insulator MOSFETs-
dc.typeArticle-
dc.identifier.wosid000376199800002-
dc.identifier.scopusid2-s2.0-84966304370-
dc.type.rimsART-
dc.citation.volume122-
dc.citation.beginningpage8-
dc.citation.endingpage12-
dc.citation.publicationnameSOLID-STATE ELECTRONICS-
dc.identifier.doi10.1016/j.sse.2016.04.011-
dc.contributor.nonIdAuthorKim, Seong Kwang-
dc.contributor.nonIdAuthorLee, Jungmin-
dc.contributor.nonIdAuthorGeum, Dae-Myeong-
dc.contributor.nonIdAuthorPark, Min-Su-
dc.contributor.nonIdAuthorChoi, Won Jun-
dc.contributor.nonIdAuthorChoi, Sung-Jin-
dc.contributor.nonIdAuthorKim, Dae Hwan-
dc.contributor.nonIdAuthorKim, Dong Myong-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
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