A 3.9μW, 81.3dB SNDR, DC-coupled, Time-based Neural Recording IC with Degeneration R-DAC for Bidirectional Neural Interface in 180nm CMOS
- Publisher
- IEEE
- Issue Date
- 2018-11-07
- Language
- English
- Citation
IEEE Asian Solid-State Circuits Conference
- Appears in Collection
- EE-Conference Papers(학술회의논문)
- Files in This Item
- There are no files associated with this item.
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