DC Field | Value | Language |
---|---|---|
dc.contributor.author | Jeon, Hyuntak | ko |
dc.contributor.author | Bang, Jun-Suk | ko |
dc.contributor.author | Jung, Yoontae | ko |
dc.contributor.author | Lee, Taeju | ko |
dc.contributor.author | Jeon, Yeseul | ko |
dc.contributor.author | Koh, Seok-Tae | ko |
dc.contributor.author | Choi, Jaeseok | ko |
dc.contributor.author | Jang, Doojin | ko |
dc.contributor.author | Hong, Soonyoung | ko |
dc.contributor.author | Je, Minkyu | ko |
dc.date.accessioned | 2018-12-20T01:59:52Z | - |
dc.date.available | 2018-12-20T01:59:52Z | - |
dc.date.created | 2018-11-28 | - |
dc.date.issued | 2018-11-07 | - |
dc.identifier.citation | IEEE Asian Solid-State Circuits Conference | - |
dc.identifier.uri | http://hdl.handle.net/10203/247279 | - |
dc.language | English | - |
dc.publisher | IEEE | - |
dc.title | A 3.9μW, 81.3dB SNDR, DC-coupled, Time-based Neural Recording IC with Degeneration R-DAC for Bidirectional Neural Interface in 180nm CMOS | - |
dc.type | Conference | - |
dc.type.rims | CONF | - |
dc.citation.publicationname | IEEE Asian Solid-State Circuits Conference | - |
dc.identifier.conferencecountry | CH | - |
dc.identifier.conferencelocation | Shangri-La's Far Eastern Plaza Hotel, Tainan | - |
dc.contributor.localauthor | Je, Minkyu | - |
dc.contributor.nonIdAuthor | Jeon, Hyuntak | - |
dc.contributor.nonIdAuthor | Bang, Jun-Suk | - |
dc.contributor.nonIdAuthor | Jung, Yoontae | - |
dc.contributor.nonIdAuthor | Lee, Taeju | - |
dc.contributor.nonIdAuthor | Jeon, Yeseul | - |
dc.contributor.nonIdAuthor | Koh, Seok-Tae | - |
dc.contributor.nonIdAuthor | Choi, Jaeseok | - |
dc.contributor.nonIdAuthor | Jang, Doojin | - |
dc.contributor.nonIdAuthor | Hong, Soonyoung | - |
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