This paper presents an efficient implementation of multiple interleavers in interleave division multiple access (IDMA) for the 5G telecommunication. Rather than focusing on designing a single interleaver efficiently, in this paper, all the interleavers in an IDMA system are designed as a whole. More specifically, the interleaving formulae of multiple interleavers are mapped to a multiple constant multiplication problem, and common subexpressions are eliminated from the adder tree. As a result, the proposed architecture replaces costly multipliers with a similar number of adders, effectively reducing the hardware resources required to implement an IDMA system.