First Demonstration of a Logic-process Compatible Junctionless Ferroelectric FinFET Synapse for Neuromorphic Applications

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dc.contributor.authorSeo, Myungsooko
dc.contributor.authorKang, Min Hoko
dc.contributor.authorJeon, Seung-Baeko
dc.contributor.authorBae, Hagyoulko
dc.contributor.authorHur, Jaeko
dc.contributor.authorJang, Byung Chulko
dc.contributor.authorYun, Seokjungko
dc.contributor.authorCho, Seongwooko
dc.contributor.authorKim, Wu-kangko
dc.contributor.authorKim, Myung-Suko
dc.contributor.authorHwang, Kyu-Manko
dc.contributor.authorHONG, DANIEL SEUNGBUMko
dc.contributor.authorChoi, Sung-Yoolko
dc.contributor.authorChoi, Yang-Kyuko
dc.date.accessioned2018-09-18T06:36:37Z-
dc.date.available2018-09-18T06:36:37Z-
dc.date.created2018-07-05-
dc.date.created2018-07-05-
dc.date.created2018-07-05-
dc.date.created2018-07-05-
dc.date.issued2018-09-
dc.identifier.citationIEEE ELECTRON DEVICE LETTERS, v.39, no.9, pp.1445 - 1448-
dc.identifier.issn0741-3106-
dc.identifier.urihttp://hdl.handle.net/10203/245657-
dc.description.abstractA highly scalable synapse device based on a junctionless (JL) ferroelectric (FE) FinFET is presented for neuromorphic applications. The synaptic behaviors of the JL metal-ferroelectric-insulator-silicon FinFET were experimentally demonstrated after verifying the ferroelectric characteristics of the HfZrOx (HZO) film using a metal-ferroelectric-metal capacitor. The fabricated synapse showed distinguishable polarization switching behaviors with gradually controllable channel conductance. From neural network simulations using the proposed JL FE FinFET as synapses, the pattern recognition accuracy for hand-written digits was validated to be approximately 80% for neuromorphic applications.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleFirst Demonstration of a Logic-process Compatible Junctionless Ferroelectric FinFET Synapse for Neuromorphic Applications-
dc.typeArticle-
dc.identifier.wosid000443054700044-
dc.identifier.scopusid2-s2.0-85049470094-
dc.type.rimsART-
dc.citation.volume39-
dc.citation.issue9-
dc.citation.beginningpage1445-
dc.citation.endingpage1448-
dc.citation.publicationnameIEEE ELECTRON DEVICE LETTERS-
dc.identifier.doi10.1109/LED.2018.2852698-
dc.contributor.localauthorHONG, DANIEL SEUNGBUM-
dc.contributor.localauthorChoi, Sung-Yool-
dc.contributor.localauthorChoi, Yang-Kyu-
dc.contributor.nonIdAuthorKang, Min Ho-
dc.contributor.nonIdAuthorYun, Seokjung-
dc.contributor.nonIdAuthorKim, Wu-kang-
dc.contributor.nonIdAuthorKim, Myung-Su-
dc.contributor.nonIdAuthorHwang, Kyu-Man-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorJunctionless FET-
dc.subject.keywordAuthorferroelectric FET-
dc.subject.keywordAuthorFinFET-
dc.subject.keywordAuthorsynapse-
dc.subject.keywordAuthorneuromorphic computing system-
dc.subject.keywordPlusSYSTEMS-
dc.subject.keywordPlusMEMORY-
dc.subject.keywordPlusTRANSISTORS-
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