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A 500-Mb/a quadruple data rate SDRAM interface using a skew cancellation technique Wang, SH; Kim, J; Lee, J; Nam, HS; Kim, YG; Shim, JH; Ahn, HK; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.36, no.4, pp.648 - 657, 2001-04 |
A 64-Mbit, 640-MByte/s bidirectional data strobed, double-data-rate SDRAM with a 40-mW DLL for a 256-MByte memory system Kim, CH; Lee, J; Kim, Beom-Sup; Park, CS; Lee, S; Park, CW; Roh, JG; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.33, no.11, pp.1703 - 1710, 1998-11 |
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