Browse "RIMS Collection" by Author Hwang Seung Ho
Showing results 6 to 9 of 9
| Reducing the size of a BDD in the combinational circuit power estimation by using the dynamic size limit Choi Hoon; Hwang Seung Ho, Proceedings of the 1997 IEEE International Symposium on Circuits and Systems, ISCAS'97. Part 4 (of 4), v.3, pp.1520 - 1523, 1997-06-09 |
| Stochastic evolution algorithm for the graph covering problem and its application to the technology mapping Lee Dae-Hyun; Choi Hoon; Park Lae-Jeong; Park, Cheol Hoon; Hwang Seung Ho, Proceedings of the 1996 IEEE International Conference on Evolutionary Computation, ICEC'96, pp.475 - 479, 1996-05-20 |
| Technology mapping for storage elements based on BDD matching Yi Ju Hwan; Hwang Seung Ho, Proceedings of the 1997 40th Midwest Symposium on Circuits and Systems. Part 1 (of 2), pp.1099 - 1102, Midwest Symposium on Circuits and Systems, 1997-08-03 |
| Time-stamped transition density for the estimation of delay dependent switching activities Choi Hoon; Hwang Seung Ho, Proceedings of the 1997 International Conference on Computer Design, pp.68 - 73, IEEE, 1997-10-12 |
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