Circuit for controlling waveform distortion at a control terminal of a radio frequency transistor초고주파용 전계효과 트랜지스터회로의 게이트단자 파형 왜곡제어회로

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The present invention relates to a circuit for controlling waveform distortion resulting from nonlinearity of the impedance of a control terminal (gate or base) capacitance of a transistor, which can be employed in circuits showing a nonlinearity performance of high frequency amplifier or oscillator. According to the circuit of the invention, the waveform distortion can be properly controlled to improve the efficiency of power conversion in a high frequency circuit employing FET, regardless of the frequency band, while assuring a favorable matching of input for the circuit. Also, it can provide the reliability of an integrated circuit by employing outside voltage control circuit. Moreover, it can be fabricated on a wafer substrate of FET circuit with an inexpensive cost, which affords unrestricted designing of the circuit.
Assignee
KAIST
Country
US (United States)
Issue Date
2001-04-24
Application Date
1997-10-30
Application Number
08960640
Registration Date
2001-04-24
Registration Number
6222412
URI
http://hdl.handle.net/10203/233637
Appears in Collection
EE-Patent(특허)
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