Circuit for controlling waveform distortion at a control terminal of a radio frequency transistor초고주파용 전계효과 트랜지스터회로의 게이트단자 파형 왜곡제어회로

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dc.contributor.author홍성철ko
dc.date.accessioned2017-12-20T11:13:49Z-
dc.date.available2017-12-20T11:13:49Z-
dc.date.issued2001-04-24-
dc.identifier.urihttp://hdl.handle.net/10203/233637-
dc.description.abstractThe present invention relates to a circuit for controlling waveform distortion resulting from nonlinearity of the impedance of a control terminal (gate or base) capacitance of a transistor, which can be employed in circuits showing a nonlinearity performance of high frequency amplifier or oscillator. According to the circuit of the invention, the waveform distortion can be properly controlled to improve the efficiency of power conversion in a high frequency circuit employing FET, regardless of the frequency band, while assuring a favorable matching of input for the circuit. Also, it can provide the reliability of an integrated circuit by employing outside voltage control circuit. Moreover, it can be fabricated on a wafer substrate of FET circuit with an inexpensive cost, which affords unrestricted designing of the circuit.-
dc.titleCircuit for controlling waveform distortion at a control terminal of a radio frequency transistor-
dc.title.alternative초고주파용 전계효과 트랜지스터회로의 게이트단자 파형 왜곡제어회로-
dc.typePatent-
dc.type.rimsPAT-
dc.contributor.localauthor홍성철-
dc.contributor.assigneeKAIST-
dc.identifier.iprsType특허-
dc.identifier.patentApplicationNumber08960640-
dc.identifier.patentRegistrationNumber6222412-
dc.date.application1997-10-30-
dc.date.registration2001-04-24-
dc.publisher.countryUS-
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EE-Patent(특허)
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