유전체 도파관을 이용한 멀티채널 Chip-to-Chip 저전력 고속 유선 인터페이스Low Power, High Speed Multi-Channel Chip-to-Chip Interface using Dielectric Waveguide

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Assignee
KAIST
Country
US (United States)
Issue Date
2015-07-28
Application Date
2013-12-11
Application Number
14103005
Registration Date
2015-07-28
Registration Number
9093732
URI
http://hdl.handle.net/10203/232160
Appears in Collection
EE-Patent(특허)
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