Top-down fabrication of silicon-nanowire arrays for large-scale integration on a flexible substrate for achieving high-resolution neural microelectrodes

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dc.contributor.authorLee, Sangminko
dc.date.accessioned2017-04-17T07:29:19Z-
dc.date.available2017-04-17T07:29:19Z-
dc.date.created2017-04-10-
dc.date.created2017-04-10-
dc.date.issued2017-02-
dc.identifier.citationMICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS, v.23, no.2, pp.491 - 498-
dc.identifier.issn0946-7076-
dc.identifier.urihttp://hdl.handle.net/10203/223289-
dc.description.abstractIn order to implement a nanowire-integrated device, well-aligned arrays of a silicon nanowires are necessary for scalable and repeatable mass production. Especially for biomedical applications in neural engineering, device flexibility robust to mechanical bending, without compromising the electrical performance, is a key issue to be resolved. In this paper, a simple fabrication method and the large-scale integration of silicon-nanowire arrays is proposed by combining top-down fabrication with nanowire transfer on flexible substrate for applications in high-resolution neural stimulation microelectrodes. The arrayed silicon nanowires are fabricated on a p-type, (111)-oriented, single-crystalline-silicon substrate by a top-down process that includes silicon dry etching, silicon wet etching, and wet oxidation. After the fabrication of nanowire arrays, the device is transferred to flexible substrate using polyimide coating, electrode formation, and substrate removal. In order to verify the feasibility of the proposed method, a silicon-nanowire field-effect transistor (FET) switch is implemented and evaluated. The results of the proposed method show an excellent potential for high-resolution neural stimulation microelectrodes.-
dc.languageEnglish-
dc.publisherSPRINGER-
dc.titleTop-down fabrication of silicon-nanowire arrays for large-scale integration on a flexible substrate for achieving high-resolution neural microelectrodes-
dc.typeArticle-
dc.identifier.wosid000394456100026-
dc.identifier.scopusid2-s2.0-85009266150-
dc.type.rimsART-
dc.citation.volume23-
dc.citation.issue2-
dc.citation.beginningpage491-
dc.citation.endingpage498-
dc.citation.publicationnameMICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS-
dc.identifier.doi10.1007/s00542-017-3271-6-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle; Proceedings Paper-
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