DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Ki-Mok | ko |
dc.contributor.author | Choi, Won-Shik | ko |
dc.contributor.author | Park, Ki-Hyeon | ko |
dc.date.accessioned | 2016-11-30T01:37:54Z | - |
dc.date.available | 2016-11-30T01:37:54Z | - |
dc.date.created | 2016-11-02 | - |
dc.date.created | 2016-11-02 | - |
dc.date.created | 2016-11-02 | - |
dc.date.issued | 2014-10 | - |
dc.identifier.citation | IET POWER ELECTRONICS, v.7, no.10, pp.2678 - 2686 | - |
dc.identifier.issn | 1755-4535 | - |
dc.identifier.uri | http://hdl.handle.net/10203/214162 | - |
dc.description.abstract | This study presents a new carrier-based hybrid pulse width modulation (PWM) Method for the cascaded capacitor-clamp multilevel inverter (CCCMLI), which combines the benefits of a new alternative level-shifted carrier PWM and a phase-shifted carrier PWM. For modulating the CCCMLI, the phase disposition sub-harmonic PWM was first proposed, but does not show good performances in an even load sharing between inverter cells connected in series, flying-capacitor voltage balancing and output waveform quality. On the other hand, a proposed PWM method enables to achieve a balanced load sharing between cascaded cells even at low amplitude modulation indices as well as the excellent voltage balancing control of the flying-capacitors with a much smaller voltage ripple and the good harmonic characteristics in output waveforms. The proposed modulation is verified through both simulation and field-programmable gate array (FPGA) based experimental results. | - |
dc.language | English | - |
dc.publisher | INST ENGINEERING TECHNOLOGY-IET | - |
dc.title | Novel carrier-based hybrid pulse width modulation method for cascaded capacitor-clamp multilevel inverter | - |
dc.type | Article | - |
dc.identifier.wosid | 000343973800025 | - |
dc.identifier.scopusid | 2-s2.0-84908213890 | - |
dc.type.rims | ART | - |
dc.citation.volume | 7 | - |
dc.citation.issue | 10 | - |
dc.citation.beginningpage | 2678 | - |
dc.citation.endingpage | 2686 | - |
dc.citation.publicationname | IET POWER ELECTRONICS | - |
dc.identifier.doi | 10.1049/iet-pel.2014.0035 | - |
dc.contributor.nonIdAuthor | Choi, Won-Shik | - |
dc.contributor.nonIdAuthor | Park, Ki-Hyeon | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | PWM invertors | - |
dc.subject.keywordAuthor | cascade networks | - |
dc.subject.keywordAuthor | capacitors | - |
dc.subject.keywordAuthor | carrier-based hybrid pulse width modulation method | - |
dc.subject.keywordAuthor | cascaded capacitor-clamp multilevel inverter | - |
dc.subject.keywordAuthor | CCCMLI | - |
dc.subject.keywordAuthor | alternative level-shifted carrier PWM | - |
dc.subject.keywordAuthor | inverter cells | - |
dc.subject.keywordAuthor | flying-capacitor voltage balancing | - |
dc.subject.keywordAuthor | output waveform quality | - |
dc.subject.keywordAuthor | voltage ripple | - |
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