An 8-bit-resolution, 360-mu s write time nonvolatile analog memory based on differentially balanced constant-tunneling-current scheme (DBCS)
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kim, KH | ko |
| dc.contributor.author | Lee, Kwyro | ko |
| dc.contributor.author | Jung, TS | ko |
| dc.contributor.author | Suh, KD | ko |
| dc.date.accessioned | 2011-01-04T05:43:05Z | - |
| dc.date.available | 2011-01-04T05:43:05Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 1998-11 | - |
| dc.identifier.citation | IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.33, no.11, pp.1758 - 1762 | - |
| dc.identifier.issn | 0018-9200 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/21351 | - |
| dc.description.abstract | This paper describes a fast and accurate nonvolatile analog memory (NVAM) and its programming scheme. Both constant programming rate and single-pulse programmability have been achieved, which drastically enhance programming speed and accuracy. A prototype chip containing 8 x 128 NVAM I cells (cell size of 9 x 13.6 mu m(2)) has been fabricated using 0.8-mu m CMOS. Each cell is measured to store more than eight bit levels within 360 mu s. | - |
| dc.description.sponsorship | The authors wish to thank Dr. T.-S. Jung and Dr. K.-D. Suh for their useful discussion and chip fabrication support. | en |
| dc.language | English | - |
| dc.language.iso | en_US | en |
| dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
| dc.subject | NEURAL NETWORKS | - |
| dc.subject | DEVICE | - |
| dc.title | An 8-bit-resolution, 360-mu s write time nonvolatile analog memory based on differentially balanced constant-tunneling-current scheme (DBCS) | - |
| dc.type | Article | - |
| dc.identifier.wosid | 000076702900021 | - |
| dc.identifier.scopusid | 2-s2.0-0032204665 | - |
| dc.type.rims | ART | - |
| dc.citation.volume | 33 | - |
| dc.citation.issue | 11 | - |
| dc.citation.beginningpage | 1758 | - |
| dc.citation.endingpage | 1762 | - |
| dc.citation.publicationname | IEEE JOURNAL OF SOLID-STATE CIRCUITS | - |
| dc.embargo.liftdate | 9999-12-31 | - |
| dc.embargo.terms | 9999-12-31 | - |
| dc.contributor.localauthor | Lee, Kwyro | - |
| dc.contributor.nonIdAuthor | Kim, KH | - |
| dc.contributor.nonIdAuthor | Jung, TS | - |
| dc.contributor.nonIdAuthor | Suh, KD | - |
| dc.type.journalArticle | Article | - |
| dc.subject.keywordPlus | NEURAL NETWORKS | - |
| dc.subject.keywordPlus | DEVICE | - |
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