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Showing results 1 to 11 of 11

1
1.8-GHz self-calibrated phase-locked loop with precise I/Q matching

Park Chan-Hong; Kim Ook; Kim Beomsup, 2000 Symposium on VLSI Circuits, pp.242 - 243, 2000-06-15

2
A low-noise, 900-MHz VCO in 0.6-μm CMOS

Park Chan-Hong; Kim Beomsup, Proceedings of the 1998 Symposium on VLSI Circuits, pp.28 - 29, 1998-06-11

3
Bandwidth

Lim Kyoohyun; Park Chan-Hong; Kim Beomsup, Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6), v.1, pp.163 - 166, 1998-05-31

4
Baseband clock recovery algorithm for pi/4-QPSK modulated signals

Lee Jeong Eun; Choi Seung Hee; Kim Beomsup, Proceedings of the 47th IEEE Vehicular Technology Conference. Part 1 (of 3), 1997, v.3, pp.1729 - 1733, 1997-05-04

5
Design of a 3.0 V CMOS continuous time low-pass filter with on-chip tuning circuits for CDMA cellular phone application

Park Chan-Hong; Kim Beomsup, Proceedings of the 1997 40th Midwest Symposium on Circuits and Systems. Part 1 (of 2), pp.1374 - 1377, Midwest Symposium on Circuits and Systems, 1997-08-03

6
Digital audio signal processor for cellular phone application

Yang Jeongsik; Park Chanhong; Kim Beomsup, Proceedings of the 1995 Asia and South Pacific Design Automation Conference, ASP-DAC'95, pp.183 - 187, 1995-08-29

7
Digital phase-locked loop with variable loop gains derived from RLS method

Chun Byungjin; Choi Seung Hee; Kim Beomsup, Proceedings of the 1997 IEEE International Conference on Communications, ICC. Part 3 (of 3), v.1, pp.11 - 15, 1997-06-08

8
Low-power CMOS on-chip voltage reference using MOS PTAT: An EP approach

Seo Yoon-Deuk; Nam, Dongkyung; Yoon Byoung-Jin; Choi Il-Hyun; Kim Beomsup, Proceedings of the 1997 10th Annual IEEE International ASIC Conference and Exhibit, pp.316 - 320, IEEE, 1997-09-07

9
Non-data-aided timing recovery algorithm for ?/4-QPSK modulated signals

Kim Beomsup; Koo Jun Mo; Lee Joonsuk; Min Byung Jun; Choi Seung Hee, 2000 IEEE International Conference on Communications, pp.392 - 396, IEEE, 2000-06-18

10
Optimal loop bandwidth design for low noise PLL applications

Lim Kyoohyun; Choi Seunghee; Kim Beomsup, Proceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC, pp.425 - 428, ASP-DAC, 1997-01-28

11
PLL/DLL system noise analysis for low jitter clock synthesizer design

Kim Beomsup; Weigandt Todd C.; Gray Paul R., Proceedings of the 1994 IEEE International Symposium on Circuits and Systems. Part 3 (of 6), v.4, pp.31 - 34, 1994-05-30

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