Browse "School of Electrical Engineering(전기및전자공학부)" by Title
Showing results 24081 to 24100 of 51620
| Longer distance continuous variable quantum key distribution protocol with photon subtraction at the receiver Lim, Kyongchun; Suh, Changho; Rhee, June-Koo Kevin, QUANTUM INFORMATION PROCESSING, v.18, no.3, 2019-03 |
| Longitudinal mode perturbation of laser diodes with dry etched total internal reflector Choi, JH; Hong, Songcheol; Kwon, YS, IEEE PHOTONICS TECHNOLOGY LETTERS, v.9, no.10, pp.1310 - 1312, 1997 |
| Longitudinal Mode Selectivity of Integrated Twin-Guide Laser Diode Hong, Songcheol; Ji, Jeong-keun; Kwon, Young-Se, 제 2회 한국반도체 학술대회, pp.371 - 372, 1995 |
| LONLIES: Estimating property values for long tail entities Farid, Mina; IIyas, Ihab F.; Whang, Steven Euijong; Yu, Cong, 39th International ACM SIGIR Conference on Research and Development in Information Retrieval, SIGIR 2016, pp.1125 - 1128, ACM Special Interest Group on Information Retrieval (SIGIR), 2016-07 |
| Lookup table-based adaptive body biasing of multiple macros Choi, B.; Shin, Youngsoo, 8th International Symposium on Quality Electronic Design, ISQED 2007, pp.533 - 538, ISQED '07, 2007-03-26 |
| Lookup table-based adaptive body biasing of multiple macros = 룩업 테이블을 이용한 다중 매크로 블록의 어댑티브 바디 바이어싱link Choi, Byung-hee; 최병희; et al, 한국과학기술원, 2008 |
| LOOKUP TABLE-BASED ADAPTIVE BODY BIASING OF MULTIPLE MACROS FOR PROCESS VARIATION COMPENSATION AND LOW LEAKAGE Choi, B; Shin, Youngsoo, JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, v.19, no.7, pp.1449 - 1464, 2010-11 |
| Loop and address code optimization for digital signal processors Lee, JY; Park, In-Cheol, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E85A, no.6, pp.1408 - 1415, 2002-06 |
| Loop and Address Code Optimization for Digital Signal Processors Lee, JY; Park, In-Cheol, 한국반도체학술대회 (KCS), pp.103 - 104, 2002-02 |
| Loop Calculus and Bootstrap-Belief Propagation for Perfect Matchings on Arbitrary Graphs Michael Chertkov; Andrew Gelfand; Shin, Jinwoo, ICSG2013-SLS, ISGO, 2013-07-29 |
| Loop filtering and post-filtering for low-bit-rates moving picture coding Lee, YL; Park, HyunWook, SIGNAL PROCESSING-IMAGE COMMUNICATION, v.16, no.9, pp.871 - 890, 2001-06 |
| Loop unrolled SAR based two-step ADC with time-domain backend = 시간 영역 백앤드를 활용한 루프 언롤드 축차 비교 기반의 2단 아날로그-디지털 변환기link Shin, Hyun-Woo; Ryu, Seung-Tak; et al, 한국과학기술원, 2023 |
| Loop-based inductance extraction and modeling for multiconductor on-chip interconnects Yu, S; Petranovic, DM; Krishnan, S; Lee, Kwyro; Yang, CY, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.53, pp.135 - 145, 2006-01 |
| Loop-filtering and post-filtering for low bit-rates moving picture coding Lee, Y.L.; Park, HyunWook, International Conference on Image Processing (ICIP'99), v.1, pp.94 - 98, IEEE, 1999-10-24 |
| Loosely coupled memory-based decoding architecture for low density parity check codes Kang, S.-H.; Park, In-Cheol, IEEE 2005 Custom Integrated Circuits Conference, v.2005, pp.703 - 706, 2005-09-18 |
| Loosely Coupled Memory-Based Decoding Architecture for Low Density Parity Check Codes Kang , SH; Park, In-Cheol, The 13th Kirean Conference on Simiconductors, 2006-02 |
| Loosely coupled memory-based decoding architecture for low density parity check codes Kang, SH; Park, In-Cheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.53, no.5, pp.1045 - 1056, 2006-05 |
| Loosely Coupled Memory-Based Decoding Architecture for Low Desity Parity Check Codes Kang , SH; Park, In-Cheol, IT-SoC conference, 2005 |
| LOR-based reconstruction for super-resolved 3D PET image Ahn, Il Jun; Kim, Ji Hye; Nam, Woo Hyun; Chang, Yongjin; Ra, Jong Beom, Nuclear Science Symposium & Medical Imaging Conference, IEEE, 2013-11-01 |
| LOR-Based Reconstruction for Super-Resolved 3D PET Image on GPU Ahn, Il Jun; Kim, Ji Hye; Chang, Yongjin; Jeong, Kye Young; Ra, Jong Beom, IEEE TRANSACTIONS ON NUCLEAR SCIENCE, v.62, no.3, pp.859 - 868, 2015-06 |
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