Browse "School of Electrical Engineering(전기및전자공학부)" by Subject germanium
Showing results 1 to 13 of 13
| Development of process technology for high performance Ge MOSFETs = 단위 공정 연구를 통한 고성능 게르마늄 소자 개발link Seo, Yu Jin; 서유진; et al, 한국과학기술원, 2017 |
| Effect of Hydrogen Annealing on Contact Resistance Reduction of Metal-Interlayer-n-Germanium Source/Drain Structure Kim, Gwang-Sik; Yoo, Gwangwe; Seo, Yujin; Kim, Seung-Hwan; Cho, Karam; Cho, Byung-Jin; Shin, Changhwan; et al, IEEE ELECTRON DEVICE LETTERS, v.37, no.6, pp.709 - 712, 2016-06 |
| Effect of Metal Nitride on Contact Resistivity of Metal-Interlayer-Ge Source/Drain in Sub-10-nm n-Type Ge FinFET Ahn, Juhan; Kim, Jeong-Kyu; Kim, Sun-Woo; Kim, Gwang-Sik; Shin, Changhwan; Kim, Jong-Kook; Cho, Byung-Jin; et al, IEEE ELECTRON DEVICE LETTERS, v.37, no.6, pp.705 - 708, 2016-06 |
| Effective Schottky Barrier Height Lowering of Metal/n-Ge with a TiO2/GeO2 Interlayer Stack Kim, Gwang-Sik; Kim, Sun-Woo; Kim, Seung-Hwan; Park, June; Seo, Yujin; Cho, Byung-Jin; Shin, Changhwan; et al, ACS APPLIED MATERIALS INTERFACES, v.8, no.51, pp.35419 - 35425, 2016-12 |
| Fermi Level Depinning in Ti/GeO2/n-Ge via the Interfacial Reaction Between Ti and GeO2 Seo, Yujin; Lee, Tae In; Ahn, Hyunjun; Moon, Jungmin; Hwang, Wan Sik; Yu, Hyun-Yong; Cho, Byung Jin, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.64, no.10, pp.4242 - 4245, 2017-10 |
| Fermi-Level Unpinning Technique with Excellent Thermal Stability. for n-Type Germanium Kim, Gwang-Sik; Kim, Seung-Hwan; Lee, Tae In; Cho, Byung Jin; Choi, Changhwan; Shin, Changhwan; Shim, Joon Hyung; et al, ACS APPLIED MATERIALS & INTERFACES, v.9, no.41, pp.35988 - 35997, 2017-10 |
| Grain Size Engineering using Amorphous-Ge/Si Stack to Enhance Channel Mobility for NAND Flash Memory Lee, Tae In; Kim, Min Ju; Shin, Eui Joong; Lee, Gyusoup; Jeong, Jaejoong; Lee, Yun Hee; Lee, Jung Hoon; et al, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.69, no.10, pp.5940 - 5943, 2022-10 |
| Investigation of Border Trap Characteristics in the AlON/GeO2/Ge Gate Stacks Seo, Yujin; Kim, Choong-Ki; Lee, Tae-In; Hwang, Wan Sik; Yu, Hyun-Yong; Choi, Yang-Kyu; Cho, Byung Jin, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.64, no.10, pp.3998 - 4001, 2017-10 |
| Performance Assessment of III-V Channel Ultra-Thin-Body Schottky-Barrier MOSFETs Lee, Jaehyun; Shin, Mincheol, IEEE ELECTRON DEVICE LETTERS, v.35, no.7, pp.726 - 728, 2014-07 |
| Random Dopant Fluctuation-Induced Threshold Voltage Variation-Immune Ge FinFET With Metal-Interlayer-Semiconductor Source/Drain Shin, Changho; Kim, Jeong-Kyu; Kim, Gwang-Sik; Lee, Hyunjae; Shin, Changhwan; Kim, Jong-Kook; Cho, Byung-Jin; et al, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.63, no.11, pp.4167 - 4172, 2016-11 |
| Reduction of charge trapping in HfO2 film on a Ge substrate by trimethylaluminum pretreatment Lee, Jae Jin; Shin, Yunsang; Choi, Juyun; Kim, Hyoungsub; Hyun, Sangjin; Choi, Siyoung; Cho, Byung Jin; et al, PHYSICA STATUS SOLIDI-RAPID RESEARCH LETTERS, v.6, no.11, pp.439 - 441, 2012-11 |
| Surface Passivation of Germanium Using SF6 Plasma to Reduce Source/Drain Contact Resistance in Germanium n-FET Kim, Gwang-Sik; Kim, Seung-Hwan; Kim, Jeong-Kyu; Shin, Changhwan; Park, Jin-Hong; Saraswat, Krishna C.; Cho, Byung Jin; et al, IEEE ELECTRON DEVICE LETTERS, v.36, no.8, pp.745 - 747, 2015-08 |
| The Efficacy of Metal-Interfacial Layer-Semiconductor Source/Drain Structure on Sub-10-nm n-Type Ge FinFET Performances Kim, Jeong-Kyu; Kim, Gwang-Sik; Nam, Hyohyun; Shin, Changhwan; Park, Jin-Hong; Kim, Jong-Kook; Cho, Byung-Jin; et al, IEEE ELECTRON DEVICE LETTERS, v.35, no.12, pp.1185 - 1187, 2014-12 |
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