Browse "School of Electrical Engineering(전기및전자공학부)" by Subject FLIP-FLOP
Showing results 1 to 2 of 2
| (A) reduced clock swing dual edge triggered flip-flop = 낮은 클럭 스윙 전압을 사용한 듀얼 에지 트리거드 플립 플롭link Oh, Kwang-Il; 오광일; et al, 한국과학기술원, 2004 |
| Power Gating: Circuits, Design Methodologies, and Best Practice for Standard-Cell VLSI Designs Shin, Young-Soo; Seomun, Jun; Choi, Kyu-Myung; Sakurai, Takayasu, ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, v.15, no.4, 2010-09 |
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