Browse "School of Electrical Engineering(전기및전자공학부)" by Author Son, Jun Woo
Showing results 1 to 4 of 4
| A Comprehensive Study of a Single-Transistor Latch in Vertical Pillar-Type FETs With Asymmetric Source and Drain Lee, Seung-Wook; Kim, Seong-Yeon; Hwang, Kyu-Man; Jin, Ik Kyeong; Hur, Jae; Kim, Dohyun; Son, Jun Woo; et al, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.65, no.11, pp.5208 - 5212, 2018-11 |
| (A) strategy for optimizing low operating voltage in a gate-less and capacitor-less silicon biristor = 게이트와 캐패시터가 없는 바이리스터 소자의 낮은 동작 전압을 위한 최적화 전략link Son, Jun Woo; Choi, Yang Kyu; et al, 한국과학기술원, 2019 |
| Analysis of Fluorine Effects on Charge-Trap Flash Memory of W/TiN/Al2O3/Si3N4/SiO2/Poly-Si Gate Stack Lee, Tae Yoon; Lee, Seung Hwan; Son, Jun Woo; Lee, Sang Jae; Bong, Jae Hoon; Shin, Eui Joong; Kim, Sung Ho; et al, SOLID-STATE ELECTRONICS, v.164, pp.107713, 2020-02 |
| Two-terminal biristor with polysilicon emitter layer and method of manufacturing the same Choi, Yang-Kyu; Son, Jun Woo; Hur, Jae |
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