Browse "School of Electrical Engineering(전기및전자공학부)" by Author Chang, Leland
Showing results 1 to 7 of 7
| Advanced Materials and Processes for Nanometer-scale FinFETs Choi, Yang-Kyu; King, Tsu-Jae; Ranade, Pushkar; Chang, Leland, the International Electron Devices and Materials Symposia, pp.11 - 15, 2002-12 |
| Extremely Scaled FinFETs and Ultra-Thin Body SOI CMOS Devices Choi, Yang-Kyu; Chang, Leland; Ha, Daewon; Lee, Jeongsoo; Ranade, Pushkar; Xiong, Shiying; Bokor, Jeffrey; et al, 3rd Meeting of the Electrochemical Society, 2003-04 |
| FinFET Process Refinements for Improved Mobility and Gate Work Function Engineering Choi, Yang-Kyu; Chang, Leland; Ranade, Pushkar; Lee, Jeong-Soo; Ha, Daewon; Balasubramanian, Sriram; Agarwal, Aditya; et al, IEEE IEDM Technical Digest, pp.259 - 262, IEEE, 2002-12 |
| FinFET-A quasi-Planar Double-Gate MOSFET Choi, Yang-Kyu; Tang, Stephen H.; Chang, Leland; Lindert, Nick; Lee, Wen-Chin; Huang, Xuejue; Subramanian, Vivek; et al, IEEE, pp.118 - 119, 2001-07 |
| Quasi-Planar NMOS FinFETs with sub-100nm Gate Lengths Choi, Yang-Kyu; Lindert, Nick; Chang, Leland; Anderson, Erik; Lee, Wenchin; King, Tsu-Jae; Bokor, Jeffrey; et al, 59th IEEE Device Research Conference Proceedings, pp.26 - 27, IEEE, 2001-06 |
| Reduction of Direct- Tunneling Gate Leakage Current in Double-Gate and Ultra-Thin Body MOSFETs Choi, Yang-Kyu; Chang, Leland; Yang, Kevin J.; Yeo, Tee-Chia; King, Tsu-Jae; Hu, Chenming, IEEE, pp.99 - 102, IEEE, 2001-12 |
| Sub-50nm FinFET : PMOS Choi, Yang-Kyu; Huang, Xuejue; Lee, Wen-Chin; Kuo, Charles; Hisamoto, Digh; Chang, Leland; Kedzierski, Jakub; et al, IEDM Technical Digest, pp.67 - 70, IEEE, 1999-12 |
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