Browse "School of Electrical Engineering(전기및전자공학부)" by Subject TRANSISTORS
Showing results 68 to 84 of 84
| PHYSICAL UNDERSTANDING OF LOW-FIELD CARRIER MOBILITY IN SILICON MOSFET INVERSION LAYER Lee, Kwyro; CHOI, JS; SIM, SP; Kim, Choong Ki, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.38, no.8, pp.1905 - 1912, 1991-08 |
| Quantum simulation of device characteristics of silicon nanowire FETs Shin, Mincheol, IEEE TRANSACTIONS ON NANOTECHNOLOGY, v.6, no.2, pp.230 - 237, 2007-03 |
| Quantum transport simulation of nanowire resonant tunneling diodes based on a Wigner function model with spatially dependent effective masses Lee, Joon-Ho; Shin, Mincheol, IEEE TRANSACTIONS ON NANOTECHNOLOGY, v.16, no.6, pp.1028 - 1036, 2017-11 |
| Sanitization of Data in Nanoscale Flash Memory by Thermal Erasing and Reuse of Storage Park, Jun-Young; Moon, Dong-Il; Kim, Seong-Yeon; Im, Hwon; Chang, Ki Soo; Jeong, Chanbae; Choi, Yang-Kyu, PHYSICA STATUS SOLIDI A-APPLICATIONS AND MATERIALS SCIENCE, v.215, no.14, 2018-07 |
| Seeding atomic layer deposition of high-k dielectric on graphene with ultrathin poly(4-vinylphenol) layer for enhanced device performance and reliability Shin, Woo Cheol; Kim, Taek Yong; Sul, Onejae; Cho, Byung Jin, APPLIED PHYSICS LETTERS, v.101, no.3, 2012-07 |
| Silicon Nanowire All-Around Gate MOSFETs Built on a Bulk Substrate by All Plasma-Etching Routes Moon, Dong-Il; Choi, Sung-Jin; Kim, Chung-Jin; Kim, Jee-Yeon; Lee, Jin-Seong; Oh, Jae-Sub; Lee, Gi-Sung; et al, IEEE ELECTRON DEVICE LETTERS, v.32, no.4, pp.452 - 454, 2011-04 |
| Solution-processed conformal coating of ferroelectric polymer film and its application to multi-bit memory device Kim, Woo-Young; Shim, Hyun Bin; Jeon, Gwang-Jae; Kang, In-Ku; Lee, Hee Chul, MICROELECTRONIC ENGINEERING, v.160, pp.68 - 72, 2016-07 |
| Stackable InGaAs-on-Insulator HEMTs for Monolithic 3-D Integration Jeong, Jaeyong; Kim, Seong Kwang; Kim, Jongmin; Geum, Dae-Myeong; Park, Juyeong; Jang, Jae-Hyung; Kim, Sanghyeon, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.68, no.5, pp.2205 - 2211, 2021-05 |
| Study on the synthesis of high quality single crystalline Si1-xGex nanowire and its transport properties Whang, S. J.; Lee, S. J.; Yang, W. F.; Cho, Byung Jin; Kwong, D. L., APPLIED PHYSICS LETTERS, v.91, no.7, 2007-08 |
| Switching terahertz waves with gate-controlled active graphene metamaterials Lee, Seung-Hoon; Choi, Mu-Han; Kim, Teun-Teun; Lee, Seung-Woo; Liu, Ming; Yin, Xiaobo; Choi, Hong-Kyw; et al, NATURE MATERIALS, v.11, no.11, pp.936 - 941, 2012-11 |
| Synthesis of Monolayer Graphene Having a Negligible Amount of Wrinkles by Stress Relaxation Mun, Jeong-Hun; Cho, Byung-Jin, NANO LETTERS, v.13, no.6, pp.2496 - 2499, 2013-06 |
| Thermal transport properties of thin films of small molecule organic semiconductors Kim, N; Domercq, B; Yoo, Seunghyup; Christensen, A; Kippelen, B; Graham, S, APPLIED PHYSICS LETTERS, v.87, no.24, 2005-12 |
| Tuning the electrode work function via a vapor-phase deposited ultrathin polymer film Baek, Jieung; Lee, Junseok; Joo, Munkyu; Han, Donggeon; Kim, Houngkyung; Seong, Hyejeong; Lee, Jinsup; et al, JOURNAL OF MATERIALS CHEMISTRY C, v.4, no.4, pp.831 - 839, 2016-01 |
| Two-dimensional sheet resistance model for polycrystalline graphene with overlapped grain boundaries Min, Sung Yoon; Cho, Changsoon; Shim, Gi Woong; Park, Ick Joon; Jung, Dae Yool; Woo, Young jun; Lee, Jung-Yong; et al, FLATCHEM, v.7, pp.19 - 25, 2018-01 |
| UNIFIED QUASI-STATIC MOSFET CAPACITANCE MODEL RHO, KM; Lee, Kwyro; SHUR, M; FJELDLY, TA, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.40, no.1, pp.131 - 136, 1993-01 |
| Vertically Integrated Nanowire-Based Unified Memory Lee, Byung-Hyun; Ahn, Dae-Chul; Kang, Min-Ho; Jeon, Seung-Bae; Choi, Yang-Kyu, NANO LETTERS, v.16, no.9, pp.5909 - 5916, 2016-09 |
| Zero-static-power nonvolatile logic-in-memory circuits for flexible electronics Jang, Byung Chul; Yang, Sang Yoon; Seong, Hyejeong; Kim, Sung Kyu; Choi, Junhwan; Im, Sung Gap; Choi, Sung-Yool, NANO RESEARCH, v.10, no.7, pp.2459 - 2470, 2017-07 |
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