Browse "School of Electrical Engineering(전기및전자공학부)" by Title
Showing results 30961 to 30980 of 51082
| Process Optimization for High Frequency Performance of InP-Based Heterojunction Bipolar Transistors yongjoo song; yongsik jeong; kyounghoon yang, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.3, no.1, pp.33 - 41, 2003-03 |
| Process optimization for multiple-pulse laser annealing of boron implanted silicon with germanium pre-amorphization Cho, Byung Jin; Poon, D; Lu, YF; Bhat, M; See, A, MRS Spring Meeting, pp.0 - 0, 2003-04-22 |
| Process Optimization of Screen-printed Thermoelectric Thick-films for Flexible Thermoelectric Devices Choi, Hyeongdo; Kim, Sun Jin; Kim, Yongjun; We, Ju Hyung; Shin, Ji Seon; Yi, Kevin K; Cho, Byung-Jin, The 4th International Conference on Electronic Materials and Nanotechnology for Green Environment, The Korean Institute of Metals and Materials, 2016-11-07 |
| Process scheduling for symmetrical multiprocessor UNIX system = 대칭형 다중 processor UNIX 시스템을 위한 process 스케줄링link Song, Dong-Ho; 송동호; et al, 한국과학기술원, 1986 |
| Processing in-memory architecture for binary neural networks = 바이너리 신경망을 위한 메모리 내부 처리 아키텍처 연구link Kim, Hyeonuk; Kim, Lee Sup; et al, 한국과학기술원, 2021 |
| Processing speed improvement based on an efficient symbol decoding structure in a T-DMB software baseband receiver Lee, M.; Keum, B.; Kim, E.; Shin, S.; Park, M.; Lee, Hwang Soo, 2009 IEEE International Symposium on Broadband Multimedia Systems and Broadcasting, BMSB 2009, IEEE, 2009-05-13 |
| Processing-in-memory of high bandwidth memory (PIM-HBM) architecture with efficient channels for energy efficiency and high performance in artificial Intelligence (AI) servers = 인공지능 서버에서의 에너지 효율과 고성능을 위한 효율적인 채널을 갖춘 고대역폭 메모리의 프로세싱 인 메모리 아키텍처link Kim, Seongguk; Kim, Joungho; et al, 한국과학기술원, 2020 |
| PROCESSO DE FILTRAGEM DE CIRCUITO PARA DADOS DE IMAGEM PARA A REDUÇÃO DO EFEITO DE QUANTIZAÇÃO GERADO 박현욱; 이영렬, 2016-03-22 |
| Processor and memory interface architecture for HDTV decoding = HDTV 복호를 위한 프로세서와 메모리 인터페이스 구조link Kim, Han-Soo; 김한수; et al, 한국과학기술원, 2001 |
| Processor energy estimation method using cycle-approximate simulator Byun, W.-H.; Kang, K.; Kyung, Chong-Min, 2008 International SoC Design Conference, ISOCC 2008, pp.288 - 291, 2008-11-24 |
| Processor energy estimation method using cycle-approximate simulator = Cycle-approximate 시뮬레이터를 사용한 프로세서 에너지 예측방법link Byun, Woo-Hong; 변우홍; et al, 한국과학기술원, 2008 |
| Processor-based built-in self-optimizer for 90nm diode-switch PRAM Sohn, K.; Kim, H.; Yoo, J.; Woo, J.-H.; Lee, S.-J.; Cho, W.-Y.; Lim, B.-T.; et al, 2007 Symposium on VLSI Circuits, VLSIC, pp.184 - 185, 2007-06-14 |
| Processor-based turbo interleaver for multiple third-generation wireless standards Shin, MC; Park, In-Cheol, IEEE COMMUNICATIONS LETTERS, v.7, pp.210 - 212, 2003-05 |
| Product search framework with categorization and identification Park, C.; Kweon, In-So, 2008 International Conference on Control, Automation and Systems, ICCAS 2008, pp.1757 - 1760, 123, 2008-10-14 |
| Profile Measurement Sensor for Laser Welding Robot Kim, Chang-Hyun; Choi, Tae-Yong; Lee, Ju-Jang, Korean Society of Laser Processing, pp.32 - 35, Korean Society of Laser Processing, 2007-11 |
| Profile measurement sensor for robotic laser welding Kim, C.-H.; Choi, T.-Y.; Lee, Ju-Jang; Suh, J.; Park, K.-T.; Kang, H.-S., INTERNATIONAL JOURNAL OF MECHATRONICS AND MANUFACTURING SYSTEMS, v.3, no.3-4, pp.210 - 226, 2010-05 |
| Profile-based Workload Prediction Method for Dynamic Voltage and Frequency Scaling in Multiprocessor Embedded System Kyung, Chong-Min; Oh, Seungyong; Kim, Jungsoo; Yoo, Sungjoo, 16th Annual IFIP International Conference On Very Large Scale Integration(IFIP-VLSI-SoC), pp.207 - 212, 2008 |
| Profiling DNN Workloads on a Volta-based DGX-1 System Saiful A. Mojumder; Marcia S Louis; Yifan Sun; Amir Kavyan Ziabari; Jose L. Abellan; Kim, John Dongjun; Kaeli, David; et al, 2018 IEEE International Symposium on Workload Characterization(IISWC), pp.122 - 133, IEEE, 2018-10-02 |
| Program phase and runtime distribution-aware online DVFS for combined Vdd/Vbb scaling Kim, Jungsoo; Yoo, Sungjoo; Kyung, Chong-Min, 2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09, pp.417 - 422, 2009-04-20 |
| Program Phase-Aware Dynamic Voltage Scaling Under Variable Computational Workload and Memory Stall Environment Kim, Jungsoo; Yoo, Sungjoo; Kyung, Chong-Min, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.30, no.1, pp.110 - 123, 2011-01 |
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