Browse "School of Electrical Engineering(전기및전자공학부)" by Title
Showing results 37361 to 37380 of 51623
| THRESHOLD BOOLEAN FILTERS LEE, KD; Lee, Yong-Hoon, IEEE TRANSACTIONS ON SIGNAL PROCESSING, v.42, no.8, pp.2022 - 2036, 1994-08 |
| Threshold Boolean Filters Lee, Ki Dong; Lee, Yong H, IEEE TRANSACTIONS ON SIGNAL PROCESSING, Vol. 42, No. 8, pp.2022-2036, 1994-08 |
| threshold current density InGaAs surface-emitting lasers buried by amorphous GaAs Park, HyoHoon; Yoo, BS; Lee, EH; Park, MS; Ahn, BT, International Conference on Solid State Devices and Material 1995s, pp.443 - 445, 1995-08-21 |
| Threshold Detection for Timing Recovery Moon, Jaekyun, International Magnetics Conference, pp.0 - 0, 2000-04-12 |
| Threshold extended boolean filters : their representations, analysis, and design = 임계치 확장 부울 여파기 : 그들의 표현, 분석, 그리고 설계link Song, Jong-Kwan; 송종관; et al, 한국과학기술원, 1995 |
| THRESHOLD SELECTION ALGORITHM FOR EXTRACTING A UNIFORM COLOR REGION IN AN IMAGE CHANG, BH; Kim, Seong-Dae; Kim, Jae Kyoon, ELECTRONICS LETTERS, v.23, no.25, pp.1362 - 1363, 1987-12 |
| Threshold voltage controllable high-order anodized NbO$_x$ Mott memristor and charge trap HfO$_2$ memcapacitor for neuromorphic computing = 뉴로모픽 컴퓨팅을 위한 문턱전압 조절이 가능한 고차 양극산화 나이오븀 옥사이드 모트 멤리스터 및 전하 트랩 하프늄 다이옥사이드 멤커패시터link Shin, Hyeok; 신혁; et al, 한국과학기술원, 2024 |
| Threshold Voltage Shift by Quantum Confinement in Ultra-thin Body Device Choi, Yang-Kyu; Ha, Daewon; King, Tsu-Jae; Hu, Chenming, IEEE, pp.85 - 86, 2001-06 |
| Threshold Voltage Shift Due to the Change of Impurity Type of Polysilicon in Heavily Doped Polysilicon Gate MOSFET Kim, Choong Ki, International Symposium on VLSI Technology,Systems and Applications, pp.170 - 173, 1983 |
| Threshold Voltage Tuning Technique in Gate-All-Around MOSFETs by Utilizing Gate Electrode With Potential Distribution Park, Jun-Young; Bae, Hagyoul; Moon, Dong-Il; Jeon, Chang-Hoon; Choi, Yang-Kyu, IEEE ELECTRON DEVICE LETTERS, v.37, no.11, pp.1391 - 1394, 2016-11 |
| Threshold-based admission control method for multicast environment Jo, S.K.; Guha, D.; Choi, JunKyun; Choi, S.G.; Lee, J.H., 8th International Conference Advanced Communication Technology, ICACT 2006, v.1, pp.55 - 59, 2006-02-20 |
| Threshold-based camera motion characterization of MPEG video Kim, JG; Chang, HS; Kim, J; Kim, Hyung-Myung, ETRI JOURNAL, v.26, pp.269 - 272, 2004-06 |
| Through Silicon Via (TSV) Defect Modeling, Measurement, and Analysis Jung, Daniel Hyunsuk; Kim, Youngwoo; Kim, Jonghoon J.; Kim, Heegon; Choi, Sumin; Song, Yoon-Ho; Bae, Hyun-Cheol; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.7, no.1, pp.138 - 152, 2017-01 |
| Through silicon via (TSV) equalizer Kim, Joungho; Song, E.; Cho, J.; Pak, J.S.; Lee, J.; Lee, H.; Kim, J., 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS '09, pp.13 - 16, 123, 2009-10-19 |
| Through Silicon Via (TSV) Noise Coupling Effects on RF LC-VCO in 3D IC Kim, Joung-Ho; Lim,Jaemin; Cho,Jonghyun; Lee,Manho; Jung,Danial H; Choi,sumin; Lee,Hyunsuk, 23rd Conference on Electrical Performance of Electronic Packaging and Systems, 23rd Conference on Electrical Performance of Electronic Packaging and Systems, 2014-10-26 |
| Through Silicon Via (TSV) shielding structures Cho, J.; Kim, Joungho; Song, T.; Pak, J.S.; Kim, J.; Lee, H.; Lee, J.; et al, 2010 IEEE 19th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2010, pp.269 - 272, IEEE, 2010-10-25 |
| Through silicon via time domain crosstalk modeling considering hysteretic coupling capacitance Piersanti, S; De Paulis, F; Orlandi, A; Kim, Dong-Hyun; Cho, Jong-Hyun; Kim, Joungho, IEEE International Symposium on Electromagnetic Compatibility, EMC 2015, pp.567 - 572, Institute of Electrical and Electronics Engineers Inc., 2015-08 |
| Through-Silicon Via (TSV) Depletion Effect Cho, Jonghyun; Kim, Myunghoi; Kim, Joohee; Pak, Jun So; Kim, Joungho; Lee, Hyungdong; Lee, Junho; et al, 20th Conference on Electrical Performance of Electronic Packaging and Systems, EPEP 2011, 2011-10-24 |
| Through-Silicon Via Capacitance-Voltage Hysteresis Modeling for 2.5-D and 3-D IC Kim, Dong-Hyun; Kim, Youngwoo; Cho, Jong-Hyun; Bae, Bumhee; Park, Junyong; Lee, Hyunsuk; Lim, Jaemin; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.7, no.6, pp.925 - 935, 2017-06 |
| Through-Silicon-Via-Based Decoupling Capacitor Stacked Chip in 3-D-ICs Song, Eun-Seok; Koo, Kyoung-Choul; Pak, Jun-So; Kim, Joung-Ho, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.3, no.9, pp.1467 - 1480, 2013-09 |
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