Showing results 801 to 820 of 22810
A 54GOPS 51.8mW analog-digital mixed mode Neural Perception Engine for fast object detection Kim, M.; Kim, J.-Y.; Lee, S.; Oh, J.; Yoo, Hoi-Jun, 2009 IEEE Custom Integrated Circuits Conference, CICC '09, pp.649 - 652, 2009-09-13 |
A 550μW 10b 40MS/s SAR ADC with multistep addition-only digital error correction Cho, S.-H.; Lee, C.-K.; Kwon, J.-K.; Ryu, Seung-Tak, 32nd Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2010, pp.561 - 564, IEEE, 2010-09-19 |
A 55dB SNR with 240Hz Frame Scan Rate Mutual Capacitor 30×24 Touch-Screen Panel Read-Out IC Using Code-Division Multiple Sensing Technique Shin, Hyungcheol; Ko, Seunghoon; Jang, Hongjae; Yun, Ilhyun; Lee, Kwyro, 2013 IEEE International Solid-State Circuits Conference, ISSCC 2013, pp.388 - 389, IEEE, 2013-02-20 |
A 56fJ/Conversion-Step 178dB-FoMS Third-Order Hybrid CT-DT Δ∑ Capacitance-to-Digital Converter Jung, Yoontae; Koo, Jimin; Oh, Sein; Park, Seunga; Suh, Ji-Hoon; Cho, Donghee; Je, Minkyu, 2023 IEEE Custom Integrated Circuits Conference (CICC), IEEE, 2023-04 |
A 57mW embedded mixed-mode neuro-fuzzy accelerator for intelligent multi-core processor Oh, J.; Park, J.; Kim, G.; Lee, S.; Yoo, Hoi-Jun, 2011 IEEE International Solid-State Circuits Conference, ISSCC 2011, pp.130 - 131, IEEE, 2011-02-20 |
A 590MDE/s Semi-Global Matching Processor with Lossless Data Compression Bong, Kyeongryeol; Lee, Kyuho Jason; Yoo, Hoi-Jun, 30th IEEE International System-on-Chip Conference (SOCC), pp.18 - 22, IEEE International System-on-Chip Conference 2017, 2017-09 |
A 5GHz-95dBc-Reference-Spur 9.5mW Digital Fractional-N PLL Using Reference-Multiplied Time-to-Digital Converter and Reference-Spur Cancellation in 65nm CMOS Kim, Hyo Jun; Sang, Jinwoo; Kim, Hyunik; Jo, Youngwoo; Kim,Taeik; Park, Hojin; Cho, Seong-Hwan, 2015 IEEE International Solid-State Circuits Conference, IEEE, 2015-02-24 |
A 5mW batteryless start-up boost charger for wireless power transfer Koh, Seok Tae; Shin, Se-Un; Yang, Yu-Jin; Choi, Minseong; Jung, Seungchul; Cho, Gyu-Hyeong, 50th IEEE International Symposium on Circuits and Systems, ISCAS 2017, Institute of Electrical and Electronics Engineers Inc., 2017-05 |
A 5V Dynamic Class-C Paralleled Single-Stage Amplifier with Near-Zero Dead-Zone Control and Current-Redistributive Rail-to-Rail Gm-Boosting Technique Koh, Seok Tae; LEE, JIHUN; Kang, Gyeong-Gu; HAN, HYUNKI; Kim, Hyun-Sik, 2021 IEEE International Solid- State Circuits Conference, ISSCC 2021, pp.86 - 88, Institute of Electrical and Electronics Engineers Inc., 2021-02-13 |
A 6 bit 2 GS/s flash-assisted time-interleaved (FATI) SAR ADC with background offset calibration Sung, BRS; Lee, CK; Kim, W; Kim, JI; Hong, HK; Oh, GG; Lee, CH; et al, 2013 IEEE Asian Solid-State Circuits Conference, pp.281 - 284, IEEE, 2013-11-13 |
A 6-20 GHz compact multi-bit digital attenuator using InP/InGaAs PIN diodes Eom, H.; Yang, Kyounghoon, 2008 International Conference on Indium Phosphide and Related Materials, IPRM 2008, 123, 2008-05-25 |
A 6-30 GHz compact 3-bit digital attenuator MMIC using InP/InGaAs PEN diodes Eom, H.; Han, S.; Yang, Kyounghoon, 2008 Global Symposium on Millimeter Waves, GSMM 2008, pp.101 - 103, 2008-04-21 |
A 6-b 1-GS/s Adaptive Input Dynamic Range ADC Using Double Reference-Level for Radar System Lee, Hye-In; Won, You-Sun; Kim, Chung-Hwan; Lee, Sang-Gug, 2015 International Conference on Electronics, Information and Communication, Institute of Electronics and Information Engineers, 2015-01-29 |
A 6-bit 10-GS/s 63-mW 4x TI Time-Domain Interpolating Flash ADC in 65-nm CMOS Oh, DR; Kim, JI; Seo, MJ; Kim, JG; Ryu, Seung-Tak, European Solid-State Circuits Conference, IEEE, 2015-09-17 |
A 6-bit 4-GS/s DAC Design for Wideband Dynamic Linearity 류승탁; 김시내; 이창교; 조상현, 한국반도체학술대회, KCS 2010, 2010 |
A 6.3nJ/op low energy 160-bit modulo-multiplier for elliptic curve cryptography processor Kim, H.; Kim, Y.; Yoo, Hoi-Jun, 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008, pp.3310 - 3313, IEEE, 2008-05-18 |
A 6.4Gbps On-chip Eye Opening Monitor Circuit for Signal Integrity Analysis of High Speed Channel Kim, Joungho; Shin, Mincheol; Shim, Jongjoo; Kim, Jaemin; Pak, Jun So; Hwang, Chulsoon; Yoon, Changwook; et al, Presented at Proceeding of 2008 IEEE EMC Symposium, pp.1 - 7, 2008-08 |
A 6.5GHz CMOS FSK modulator for wireless sensor applications Cho, SeongHwan, IEEE, 2002-06-01 |
A 60 GHz Gbps Low Power CMOS Radio System integrated on LTCC AiP for Mobile Applications Park, Chul Soon, 2012 Triangle Symposium on Advanced ICT(TriSAI) Sep. 2012, 2012-09-18 |
A 60 GHz InGaP/GaAs HBT push-push MMIC VCO Kim, J.-G.; Baek, D.-H.; Jeon, S.-H.; Park, J.-W.; Hong, Songcheol, 2003 IEEE MTT-S International Microwave Symposium Digest, v.2, pp.885 - 888, 2003-06-08 |
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