A 5GHz-95dBc-Reference-Spur 9.5mW Digital Fractional-N PLL Using Reference-Multiplied Time-to-Digital Converter and Reference-Spur Cancellation in 65nm CMOS

Cited 7 time in webofscience Cited 0 time in scopus
  • Hit : 428
  • Download : 40
Publisher
IEEE
Issue Date
2015-02-24
Language
English
Citation

2015 IEEE International Solid-State Circuits Conference

URI
http://hdl.handle.net/10203/198473
Appears in Collection
EE-Conference Papers(학술회의논문)
Files in This Item
This item is cited by other documents in WoS
⊙ Detail Information in WoSⓡ Click to see webofscience_button
⊙ Cited 7 items in WoS Click to see citing articles in records_button

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0