DSpace at KOASAS: A 5GHz-95dBc-Reference-Spur 9.5mW Digital Fractional-N PLL Using Reference-Multiplied Time-to-Digital Converter and Reference-Spur Cancellation in 65nm CMOS

DSpace at KOASAS

College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Conference Papers(학술회의논문)

A 5GHz-95dBc-Reference-Spur 9.5mW Digital Fractional-N PLL Using Reference-Multiplied Time-to-Digital Converter and Reference-Spur Cancellation in 65nm CMOS

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Kim, Hyo Jun / Sang, Jinwoo / Kim, Hyunik / Jo, Youngwoo / Kim,Taeik / Park, Hojin / Cho, Seong-Hwan researcher

Publisher: IEEE

Issue Date: 2015-02-24

Language: English

Citation: 2015 IEEE International Solid-State Circuits Conference

URI: http://hdl.handle.net/10203/198473

Appears in Collection: EE-Conference Papers(학술회의논문)

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A 5GHz-95dBc-Reference-Spur 9.5mW Digital Fractional-N PLL Using Reference-Multiplied Time-to-Digital Converter and Reference-Spur Cancellation in 65nm CMOS

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