Multi-mode turbo decoder architecture for 3G and 4G wireless standards3세대와 4세대 이동통신을 위한 멀티모드 터보 디코더 구조

Cited 0 time in webofscience Cited 0 time in scopus
  • Hit : 435
  • Download : 0
Turbo codes, owing to their superb error-correcting capability, have been adopted in many advanced wireless communication standards, including the third generation (3G) and the fourth generation (4G) of mobile communication standards. In this dissertation, a high-throughput multi-mode turbo decoder is presented for the 3G and 4G of 3rd Generation Partnership Project (3GPP) wireless standards, including W-CDMA, HSDPA, HSDPA+, and LTE, LTE-Advanced. Five groups of soft-in soft-out (SISO) decoding engines, containing 16 units in total, are activated according to the operating mode and the code block size. Each SISO unit adopts radix-4 architecture for high-speed decoding. Optimizations on both the decoding algorithm and the decoder architecture are included in this work.Reverse calculation is extended from traditional radix-2 to radix-4 decoding, resulting in lower decoding power consumption due to the smaller forward metric memory size and less number of accesses to it. The on-chip memory is organized with four banks to efficiently support both types of interleaver specified in the 3G and 4G standards. Especially, the quadratic permutation polynomial (QPP) interleaver of LTE and LTE-Advanced is optimized, based on the novel properties presented in this work, so that the decoder requires only a single address generator.As 3GPP turbo codes should support wide range of code rates, conventional decoders for high rate codes are designed using large window size or border metric saving method. To achieve low error rates for wide range of code rates, novel hybrid border metric initialization is proposed in this work, which also reduces the border metric memory size in the SISO units. To further reduce the border metric memory size while maintaining the error correcting performance, dynamic border metric encoding is proposed.The proposed decoder implemented in 0.13μm CMOS process meets the throughput requirements of both 3G and 4G standards. Based on the proposed optimiz...
Advisors
Park, In-Cheolresearcher박인철
Description
한국과학기술원 : 전기및전자공학과,
Publisher
한국과학기술원
Issue Date
2014
Identifier
591823/325007  / 020105291
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전기및전자공학과, 2014.8, [ v, 55 p ]

Keywords

turbo decoder; 오류 정정 부호; 3GPP 터보 코드; 멀티모드 구조; 터보 디코더; error-correction codes; multi-mode architecture; 3GPP turbo codes

URI
http://hdl.handle.net/10203/196595
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=591823&flag=dissertation
Appears in Collection
EE-Theses_Ph.D.(박사논문)
Files in This Item
There are no files associated with this item.

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0