Quantitative tradeoff analysis of software architecture using the architecture analysis and design language

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dc.contributor.authorLee, Jihyun-
dc.contributor.authorLee, Danhyung-
dc.contributor.authorBaik, Jongmoon-
dc.contributor.authorKo, In-Young-
dc.date.accessioned2010-06-09T05:13:34Z-
dc.date.available2010-06-09T05:13:34Z-
dc.date.created2012-02-06-
dc.date.issued2009-05-27-
dc.identifier.citation10th ACIS Conference on Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing, SNPD 2009, In conjunction with IWEA 2009 and WEACR 2009, v., no., pp.561 - 566-
dc.identifier.urihttp://hdl.handle.net/10203/18788-
dc.languageENG-
dc.language.isoen_USen
dc.publisherSNPD-
dc.titleQuantitative tradeoff analysis of software architecture using the architecture analysis and design language-
dc.typeConference-
dc.identifier.scopusid2-s2.0-71249160572-
dc.type.rimsCONF-
dc.citation.beginningpage561-
dc.citation.endingpage566-
dc.citation.publicationname10th ACIS Conference on Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing, SNPD 2009, In conjunction with IWEA 2009 and WEACR 2009-
dc.identifier.conferencecountrySouth Korea-
dc.contributor.localauthorLee, Danhyung-
dc.contributor.localauthorBaik, Jongmoon-
dc.contributor.localauthorKo, In-Young-
dc.contributor.nonIdAuthorLee, Jihyun-

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