Low power pipelined FFT architecture for synthetic aperture radar signal processing

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Publisher
IEEE
Issue Date
1996-08-18
Language
English
Citation

Proceedings of the 1996 IEEE 39th Midwest Symposium on Circuits & Systems. Part 3 (of 3), pp.1367 - 1370

URI
http://hdl.handle.net/10203/116171
Appears in Collection
EE-Conference Papers(학술회의논문)
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